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author | gatecat <gatecat@ds0.me> | 2021-02-17 08:50:31 +0000 |
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committer | GitHub <noreply@github.com> | 2021-02-17 08:50:31 +0000 |
commit | a77ceec5cf5603542d87724d9fdc51d48fa29327 (patch) | |
tree | daba555e135e64e112e5167aa4eba4c3048a6b8e /machxo2/arch.cc | |
parent | a74d1a8b328252c2c07e7af7b9e9bb0e5f251bb5 (diff) | |
parent | c7c13cd95f7a25b2c8932ca00ad667ffca381c70 (diff) | |
download | nextpnr-a77ceec5cf5603542d87724d9fdc51d48fa29327.tar.gz nextpnr-a77ceec5cf5603542d87724d9fdc51d48fa29327.tar.bz2 nextpnr-a77ceec5cf5603542d87724d9fdc51d48fa29327.zip |
Merge pull request #585 from YosysHQ/gatecat/remove-ivbfc
Remove isValidBelForCell
Diffstat (limited to 'machxo2/arch.cc')
-rw-r--r-- | machxo2/arch.cc | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/machxo2/arch.cc b/machxo2/arch.cc index 2938f1ba..74bfc598 100644 --- a/machxo2/arch.cc +++ b/machxo2/arch.cc @@ -448,14 +448,6 @@ bool Arch::route() } // --------------------------------------------------------------- -bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const -{ - // FIXME: Unlike ECP5, SLICEs in a given tile do not share a clock, so - // any SLICE Cell is valid for any BEL, even if some cells are already - // bound to BELs in the tile. However, this may need to be filled in once - // more than one LUT4 and DFF type is supported. - return true; -} bool Arch::isBelLocationValid(BelId bel) const { |