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author | gatecat <gatecat@ds0.me> | 2022-09-20 14:15:10 +0200 |
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committer | gatecat <gatecat@ds0.me> | 2022-09-20 14:15:10 +0200 |
commit | a920ffcf70dad54596c84079c30a66542022ccda (patch) | |
tree | 84cbc0a284520cf809ff3e6d3c27194db9e01afa /ice40 | |
parent | 415c097df8db5693c7acd171a4ee6cb5d7b23b94 (diff) | |
download | nextpnr-a920ffcf70dad54596c84079c30a66542022ccda.tar.gz nextpnr-a920ffcf70dad54596c84079c30a66542022ccda.tar.bz2 nextpnr-a920ffcf70dad54596c84079c30a66542022ccda.zip |
ice40: implement checkPipAvailForNet
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'ice40')
-rw-r--r-- | ice40/arch.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/ice40/arch.h b/ice40/arch.h index 3563baad..5ed2347d 100644 --- a/ice40/arch.h +++ b/ice40/arch.h @@ -680,6 +680,16 @@ struct Arch : BaseArch<ArchRanges> return switches_locked[pi.switch_index] == WireId(); } + bool checkPipAvailForNet(PipId pip, NetInfo *net) const override + { + if (ice40_pip_hard_unavail(pip)) + return false; + + auto &pi = chip_info->pip_data[pip.index]; + auto swl = switches_locked[pi.switch_index]; + return swl == WireId() || (swl == getPipDstWire(pip) && wire_to_net[swl.index] == net); + } + NetInfo *getBoundPipNet(PipId pip) const override { NPNR_ASSERT(pip != PipId()); |