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| author | Sylvain Munaut <tnt@246tNt.com> | 2023-02-01 15:00:44 +0100 |
|---|---|---|
| committer | Sylvain Munaut <tnt@246tNt.com> | 2023-02-01 15:14:18 +0100 |
| commit | 582410629bb45a55aa1a3b8258bd466e71b3a972 (patch) | |
| tree | 7feca0c129a52a32bb864a6473c4e5954b89ab26 /ice40 | |
| parent | 49ae4953443951bcd9679689e76c56411a3c9385 (diff) | |
| download | nextpnr-582410629bb45a55aa1a3b8258bd466e71b3a972.tar.gz nextpnr-582410629bb45a55aa1a3b8258bd466e71b3a972.tar.bz2 nextpnr-582410629bb45a55aa1a3b8258bd466e71b3a972.zip | |
ice40: Don't assert on unknown extra_config bits if they are 0
Bits are 0 by default anyway, so if they are unknown (because icestorm
is too od) but we want them at 0 ... it's not much of an issue.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Diffstat (limited to 'ice40')
| -rw-r--r-- | ice40/bitstream.cc | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index 6794ecca..72343d75 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -153,7 +153,11 @@ static void set_ec_cbit(chipconfig_t &config, const Context *ctx, const BelConfi return; } } - NPNR_ASSERT_FALSE_STR("failed to config extra cell config bit " + name); + if (value) + NPNR_ASSERT_FALSE_STR("failed to config extra cell config bit " + name); + else + log_warning("failed to config extra cell config bit %s to zero (ignored, maybe update icestorm ?)\n", + name.c_str()); } void configure_extra_cell(chipconfig_t &config, const Context *ctx, CellInfo *cell, |