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author | Sergiusz Bazanski <q3k@q3k.org> | 2018-06-22 15:54:05 +0100 |
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committer | Sergiusz Bazanski <q3k@q3k.org> | 2018-06-22 15:54:05 +0100 |
commit | 15a7a76415cfb2e9fcbb534b324f829475036bb6 (patch) | |
tree | f5cd6d21aed83a341e786fa75a8b0053efb16656 /ice40 | |
parent | a68478598666d8fea0bef3c1814a96467bdb18ea (diff) | |
parent | e5bd4764b27c86fa804700b18bcac5cf18815314 (diff) | |
download | nextpnr-15a7a76415cfb2e9fcbb534b324f829475036bb6.tar.gz nextpnr-15a7a76415cfb2e9fcbb534b324f829475036bb6.tar.bz2 nextpnr-15a7a76415cfb2e9fcbb534b324f829475036bb6.zip |
Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into q3k/gl
Diffstat (limited to 'ice40')
-rw-r--r-- | ice40/arch.cc | 2 | ||||
-rw-r--r-- | ice40/arch.h | 7 | ||||
-rw-r--r-- | ice40/arch_place.cc | 2 | ||||
-rw-r--r-- | ice40/arch_place.h | 2 | ||||
-rw-r--r-- | ice40/bitstream.cc | 17 | ||||
-rw-r--r-- | ice40/bitstream.h | 2 | ||||
-rw-r--r-- | ice40/cells.cc | 2 | ||||
-rw-r--r-- | ice40/cells.h | 2 | ||||
-rw-r--r-- | ice40/chipdb.py | 70 | ||||
-rw-r--r-- | ice40/main.cc | 8 | ||||
-rw-r--r-- | ice40/pack.cc | 2 | ||||
-rw-r--r-- | ice40/pack.h | 2 | ||||
-rw-r--r-- | ice40/pcf.cc | 2 | ||||
-rw-r--r-- | ice40/pcf.h | 2 | ||||
-rw-r--r-- | ice40/pybindings.cc | 2 |
15 files changed, 102 insertions, 22 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc index 963b5994..f14c8045 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above diff --git a/ice40/arch.h b/ice40/arch.h index f3a46f5c..66292783 100644 --- a/ice40/arch.h +++ b/ice40/arch.h @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -166,6 +166,11 @@ enum TileType : uint32_t TILE_IO = 2, TILE_RAMB = 3, TILE_RAMT = 4, + TILE_DSP0 = 5, + TILE_DSP1 = 6, + TILE_DSP2 = 7, + TILE_DSP3 = 8, + TILE_IPCON = 9 }; struct ConfigBitPOD diff --git a/ice40/arch_place.cc b/ice40/arch_place.cc index c607c9c6..25044525 100644 --- a/ice40/arch_place.cc +++ b/ice40/arch_place.cc @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any diff --git a/ice40/arch_place.h b/ice40/arch_place.h index d276b9c4..339bf485 100644 --- a/ice40/arch_place.h +++ b/ice40/arch_place.h @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index e722cea4..165971aa 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any @@ -370,6 +370,21 @@ void write_asc(const Context *ctx, std::ostream &out) case TILE_RAMT: out << ".ramt_tile"; break; + case TILE_DSP0: + out << ".dsp0_tile"; + break; + case TILE_DSP1: + out << ".dsp1_tile"; + break; + case TILE_DSP2: + out << ".dsp2_tile"; + break; + case TILE_DSP3: + out << ".dsp3_tile"; + break; + case TILE_IPCON: + out << ".ipcon_tile"; + break; default: assert(false); } diff --git a/ice40/bitstream.h b/ice40/bitstream.h index 4dcb79bc..2b6cda1d 100644 --- a/ice40/bitstream.h +++ b/ice40/bitstream.h @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any diff --git a/ice40/cells.cc b/ice40/cells.cc index c2bc4609..3f94d4ba 100644 --- a/ice40/cells.cc +++ b/ice40/cells.cc @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any diff --git a/ice40/cells.h b/ice40/cells.h index 36c1ba19..b1f3d516 100644 --- a/ice40/cells.h +++ b/ice40/cells.h @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any diff --git a/ice40/chipdb.py b/ice40/chipdb.py index 37606b54..ac854fc8 100644 --- a/ice40/chipdb.py +++ b/ice40/chipdb.py @@ -36,10 +36,6 @@ wire_names = dict() wire_names_r = dict() wire_xy = dict() -num_tile_types = 5 -tile_sizes = {i: (0, 0) for i in range(num_tile_types)} -tile_bits = [[] for _ in range(num_tile_types)] - cbit_re = re.compile(r'B(\d+)\[(\d+)\]') portpins = dict() @@ -69,6 +65,11 @@ tiletypes["LOGIC"] = 1 tiletypes["IO"] = 2 tiletypes["RAMB"] = 3 tiletypes["RAMT"] = 4 +tiletypes["DSP0"] = 5 +tiletypes["DSP1"] = 6 +tiletypes["DSP2"] = 7 +tiletypes["DSP3"] = 8 +tiletypes["IPCON"] = 9 wiretypes["LOCAL"] = 1 wiretypes["GLOBAL"] = 2 @@ -187,6 +188,16 @@ def pipdelay(src, dst): # print(src, dst, src_type, dst_type, file=sys.stderr) assert 0 + +def init_tiletypes(device): + global num_tile_types, tile_sizes, tile_bits + if device == "5k": + num_tile_types = 10 + else: + num_tile_types = 5 + tile_sizes = {i: (0, 0) for i in range(num_tile_types)} + tile_bits = [[] for _ in range(num_tile_types)] + with open(sys.argv[1], "r") as f: mode = None @@ -198,6 +209,7 @@ with open(sys.argv[1], "r") as f: if line[0] == ".device": dev_name = line[1] + init_tiletypes(dev_name) dev_width = int(line[2]) dev_height = int(line[3]) num_wires = int(line[4]) @@ -237,6 +249,31 @@ with open(sys.argv[1], "r") as f: mode = None continue + if line[0] == ".dsp0_tile": + tiles[(int(line[1]), int(line[2]))] = "dsp0" + mode = None + continue + + if line[0] == ".dsp1_tile": + tiles[(int(line[1]), int(line[2]))] = "dsp1" + mode = None + continue + + if line[0] == ".dsp2_tile": + tiles[(int(line[1]), int(line[2]))] = "dsp2" + mode = None + continue + + if line[0] == ".dsp3_tile": + tiles[(int(line[1]), int(line[2]))] = "dsp3" + mode = None + continue + + if line[0] == ".ipcon_tile": + tiles[(int(line[1]), int(line[2]))] = "ipcon" + mode = None + continue + if line[0] == ".logic_tile_bits": mode = ("bits", 1) tile_sizes[1] = (int(line[1]), int(line[2])) @@ -257,6 +294,31 @@ with open(sys.argv[1], "r") as f: tile_sizes[4] = (int(line[1]), int(line[2])) continue + if line[0] == ".dsp0_tile_bits": + mode = ("bits", 5) + tile_sizes[5] = (int(line[1]), int(line[2])) + continue + + if line[0] == ".dsp1_tile_bits": + mode = ("bits", 6) + tile_sizes[6] = (int(line[1]), int(line[2])) + continue + + if line[0] == ".dsp2_tile_bits": + mode = ("bits", 7) + tile_sizes[7] = (int(line[1]), int(line[2])) + continue + + if line[0] == ".dsp3_tile_bits": + mode = ("bits", 8) + tile_sizes[8] = (int(line[1]), int(line[2])) + continue + + if line[0] == ".ipcon_tile_bits": + mode = ("bits", 9) + tile_sizes[9] = (int(line[1]), int(line[2])) + continue + if line[0] == ".ieren": mode = ("ieren",) continue diff --git a/ice40/main.cc b/ice40/main.cc index f2100d45..ae8c7705 100644 --- a/ice40/main.cc +++ b/ice40/main.cc @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -25,6 +25,7 @@ #include <boost/program_options.hpp> #include <fstream> #include <iostream> +#include "application.h" #include "bitstream.h" #include "design_utils.h" #include "jsonparse.h" @@ -330,10 +331,7 @@ int main(int argc, char *argv[]) } if (vm.count("gui")) { - QApplication a(argc, argv); - QSurfaceFormat fmt; - fmt.setSamples(10); - QSurfaceFormat::setDefaultFormat(fmt); + Application a(argc, argv); MainWindow w(&ctx); w.show(); diff --git a/ice40/pack.cc b/ice40/pack.cc index 35cef8b8..e9f02ddf 100644 --- a/ice40/pack.cc +++ b/ice40/pack.cc @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any diff --git a/ice40/pack.h b/ice40/pack.h index 92b76653..cdebdd79 100644 --- a/ice40/pack.h +++ b/ice40/pack.h @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any diff --git a/ice40/pcf.cc b/ice40/pcf.cc index 87d27ff1..13fe199e 100644 --- a/ice40/pcf.cc +++ b/ice40/pcf.cc @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any diff --git a/ice40/pcf.h b/ice40/pcf.h index b86a7609..315f6270 100644 --- a/ice40/pcf.h +++ b/ice40/pcf.h @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any diff --git a/ice40/pybindings.cc b/ice40/pybindings.cc index 6ce35583..97eebd3e 100644 --- a/ice40/pybindings.cc +++ b/ice40/pybindings.cc @@ -1,7 +1,7 @@ /* * nextpnr -- Next Generation Place and Route * - * Copyright (C) 2018 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2018 Clifford Wolf <clifford@symbioticeda.com> * Copyright (C) 2018 David Shah <david@symbioticeda.com> * * Permission to use, copy, modify, and/or distribute this software for any |