ice40: Add a PCF parser

Signed-off-by: David Shah <davey1576@gmail.com>

2 files changed, 2 insertions, 171 deletions

diff --git a/ice40/pack_tests/io_wrapper.v b/ice40/pack_tests/io_wrapper.v
deleted file mode 100644
index e10ec419..00000000
--- a/ice40/pack_tests/io_wrapper.v
+++ /dev/null
@@ -1,169 +0,0 @@
-module io_wrapper(input clk_pin, cen_pin, rst_pin, ina_pin, inb_pin,
-                  output outa_pin, outb_pin, outc_pin, outd_pin);
-
-    wire clk, cen, rst, ina, inb, outa, outb, outc, outd;
-
-    (* BEL="0_14_io1" *)
-    SB_IO #(
-        .PIN_TYPE(6'b 0000_01),
-        .PULLUP(1'b0),
-        .NEG_TRIGGER(1'b0)
-    ) clk_iob (
-        .PACKAGE_PIN(clk_pin),
-        .LATCH_INPUT_VALUE(),
-        .CLOCK_ENABLE(),
-        .INPUT_CLK(),
-        .OUTPUT_CLK(),
-        .OUTPUT_ENABLE(),
-        .D_OUT_0(),
-        .D_OUT_1(),
-        .D_IN_0(clk),
-        .D_IN_1()
-    );
-
-    (* BEL="0_14_io0" *)
-    SB_IO #(
-        .PIN_TYPE(6'b 0000_01),
-        .PULLUP(1'b0),
-        .NEG_TRIGGER(1'b0)
-    ) cen_iob (
-        .PACKAGE_PIN(cen_pin),
-        .LATCH_INPUT_VALUE(),
-        .CLOCK_ENABLE(),
-        .INPUT_CLK(),
-        .OUTPUT_CLK(),
-        .OUTPUT_ENABLE(),
-        .D_OUT_0(),
-        .D_OUT_1(),
-        .D_IN_0(cen),
-        .D_IN_1()
-    );
-
-    (* BEL="0_13_io1" *)
-    SB_IO #(
-        .PIN_TYPE(6'b 0000_01),
-        .PULLUP(1'b0),
-        .NEG_TRIGGER(1'b0)
-    ) rst_iob (
-        .PACKAGE_PIN(rst_pin),
-        .LATCH_INPUT_VALUE(),
-        .CLOCK_ENABLE(),
-        .INPUT_CLK(),
-        .OUTPUT_CLK(),
-        .OUTPUT_ENABLE(),
-        .D_OUT_0(),
-        .D_OUT_1(),
-        .D_IN_0(rst),
-        .D_IN_1()
-    );
-
-    (* BEL="0_13_io0" *)
-    SB_IO #(
-        .PIN_TYPE(6'b 0000_01),
-        .PULLUP(1'b0),
-        .NEG_TRIGGER(1'b0)
-    ) ina_iob (
-        .PACKAGE_PIN(ina_pin),
-        .LATCH_INPUT_VALUE(),
-        .CLOCK_ENABLE(),
-        .INPUT_CLK(),
-        .OUTPUT_CLK(),
-        .OUTPUT_ENABLE(),
-        .D_OUT_0(),
-        .D_OUT_1(),
-        .D_IN_0(ina),
-        .D_IN_1()
-    );
-
-    (* BEL="0_12_io1" *)
-    SB_IO #(
-        .PIN_TYPE(6'b 0000_01),
-        .PULLUP(1'b0),
-        .NEG_TRIGGER(1'b0)
-    ) inb_iob (
-        .PACKAGE_PIN(inb_pin),
-        .LATCH_INPUT_VALUE(),
-        .CLOCK_ENABLE(),
-        .INPUT_CLK(),
-        .OUTPUT_CLK(),
-        .OUTPUT_ENABLE(),
-        .D_OUT_0(),
-        .D_OUT_1(),
-        .D_IN_0(inb),
-        .D_IN_1()
-    );
-
-    (* BEL="0_12_io0" *)
-    SB_IO #(
-        .PIN_TYPE(6'b 0110_01),
-        .PULLUP(1'b0),
-        .NEG_TRIGGER(1'b0)
-    ) outa_iob (
-        .PACKAGE_PIN(outa_pin),
-        .LATCH_INPUT_VALUE(),
-        .CLOCK_ENABLE(),
-        .INPUT_CLK(),
-        .OUTPUT_CLK(),
-        .OUTPUT_ENABLE(),
-        .D_OUT_0(outa),
-        .D_OUT_1(),
-        .D_IN_0(),
-        .D_IN_1()
-    );
-
-    (* BEL="0_11_io1" *)
-    SB_IO #(
-        .PIN_TYPE(6'b 0110_01),
-        .PULLUP(1'b0),
-        .NEG_TRIGGER(1'b0)
-    ) outb_iob (
-        .PACKAGE_PIN(outb_pin),
-        .LATCH_INPUT_VALUE(),
-        .CLOCK_ENABLE(),
-        .INPUT_CLK(),
-        .OUTPUT_CLK(),
-        .OUTPUT_ENABLE(),
-        .D_OUT_0(outb),
-        .D_OUT_1(),
-        .D_IN_0(),
-        .D_IN_1()
-    );
-
-    (* BEL="0_11_io0" *)
-    SB_IO #(
-        .PIN_TYPE(6'b 0110_01),
-        .PULLUP(1'b0),
-        .NEG_TRIGGER(1'b0)
-    ) outc_iob (
-        .PACKAGE_PIN(outc_pin),
-        .LATCH_INPUT_VALUE(),
-        .CLOCK_ENABLE(),
-        .INPUT_CLK(),
-        .OUTPUT_CLK(),
-        .OUTPUT_ENABLE(),
-        .D_OUT_0(outc),
-        .D_OUT_1(),
-        .D_IN_0(),
-        .D_IN_1()
-    );
-
-    (* BEL="0_10_io1" *)
-    SB_IO #(
-        .PIN_TYPE(6'b 0110_01),
-        .PULLUP(1'b0),
-        .NEG_TRIGGER(1'b0)
-    ) outd_iob (
-        .PACKAGE_PIN(outd_pin),
-        .LATCH_INPUT_VALUE(),
-        .CLOCK_ENABLE(),
-        .INPUT_CLK(),
-        .OUTPUT_CLK(),
-        .OUTPUT_ENABLE(),
-        .D_OUT_0(outd),
-        .D_OUT_1(),
-        .D_IN_0(),
-        .D_IN_1()
-    );
-
-    top top_i(.clk(clk), .rst(rst), .cen(cen), .ina(ina), .inb(inb), .outa(outa), .outb(outb), .outc(outc), .outd(outd));
-endmodule
diff --git a/ice40/pack_tests/test.sh b/ice40/pack_tests/test.sh
index dd1f345c..b36c01dc 100755
--- a/ice40/pack_tests/test.sh
+++ b/ice40/pack_tests/test.sh
@@ -1,8 +1,8 @@
 #!/usr/bin/env bash
 set -ex
 NAME=${1%.v}
-yosys -p "synth_ice40 -nocarry -top io_wrapper; write_json ${NAME}.json" $1 io_wrapper.v
-../../nextpnr-ice40 --json ${NAME}.json --pack --asc ${NAME}.asc
+yosys -p "synth_ice40 -nocarry -top top; write_json ${NAME}.json" $1
+../../nextpnr-ice40 --json ${NAME}.json --pcf test.pcf --asc ${NAME}.asc
 icebox_vlog -p test.pcf ${NAME}.asc > ${NAME}_out.v
 
 yosys -p "read_verilog +/ice40/cells_sim.v;\