ice40: Add examples folder including floorplan example

Signed-off-by: David Shah <dave@ds0.me>

6 files changed, 84 insertions, 0 deletions

diff --git a/ice40/examples/blinky/blinky.pcf b/ice40/examples/blinky/blinky.pcf
new file mode 100644
index 00000000..141dfcc8
--- /dev/null
+++ b/ice40/examples/blinky/blinky.pcf
@@ -0,0 +1,6 @@
+set_io led1 99
+set_io led2 98
+set_io led3 97
+set_io led4 96
+set_io led5 95
+set_io clki 21
diff --git a/ice40/examples/blinky/blinky.proj b/ice40/examples/blinky/blinky.proj
new file mode 100644
index 00000000..f5bb9f88
--- /dev/null
+++ b/ice40/examples/blinky/blinky.proj
@@ -0,0 +1,15 @@
+{
+    "project": {
+        "version": "1",
+        "name": "blinky",
+        "arch": {
+            "name": "ice40",
+            "type": "hx1k",
+            "package": "tq144"
+        },
+        "input": {
+            "json": "blinky.json",
+            "pcf": "blinky.pcf"
+        }
+    }
+}
diff --git a/ice40/examples/blinky/blinky.sh b/ice40/examples/blinky/blinky.sh
new file mode 100755
index 00000000..a2326fc3
--- /dev/null
+++ b/ice40/examples/blinky/blinky.sh
@@ -0,0 +1,8 @@
+#!/bin/bash
+set -ex
+yosys blinky.ys
+../nextpnr-ice40 --json blinky.json --pcf blinky.pcf --asc blinky.asc
+icepack blinky.asc blinky.bin
+icebox_vlog blinky.asc > blinky_chip.v
+iverilog -o blinky_tb blinky_chip.v blinky_tb.v
+vvp -N ./blinky_tb
diff --git a/ice40/examples/blinky/blinky.v b/ice40/examples/blinky/blinky.v
new file mode 100644
index 00000000..36eaee86
--- /dev/null
+++ b/ice40/examples/blinky/blinky.v
@@ -0,0 +1,27 @@
+module blinky (
+    input  clki,
+    output led1,
+    output led2,
+    output led3,
+    output led4,
+    output led5
+);
+
+    SB_GB clk_gb (
+        .USER_SIGNAL_TO_GLOBAL_BUFFER(clki),
+        .GLOBAL_BUFFER_OUTPUT(clk)
+    );
+
+    localparam BITS = 5;
+    localparam LOG2DELAY = 21;
+
+    reg [BITS+LOG2DELAY-1:0] counter = 0;
+    reg [BITS-1:0] outcnt;
+
+    always @(posedge clk) begin
+        counter <= counter + 1;
+        outcnt <= counter >> LOG2DELAY;
+    end
+
+    assign {led1, led2, led3, led4, led5} = outcnt ^ (outcnt >> 1);
+endmodule
diff --git a/ice40/examples/blinky/blinky.ys b/ice40/examples/blinky/blinky.ys
new file mode 100644
index 00000000..a5dd2c85
--- /dev/null
+++ b/ice40/examples/blinky/blinky.ys
@@ -0,0 +1,3 @@
+read_verilog blinky.v
+synth_ice40 -top blinky
+write_json blinky.json
diff --git a/ice40/examples/blinky/blinky_tb.v b/ice40/examples/blinky/blinky_tb.v
new file mode 100644
index 00000000..f80b5e64
--- /dev/null
+++ b/ice40/examples/blinky/blinky_tb.v
@@ -0,0 +1,25 @@
+module blinky_tb;
+    reg clk;
+    always #5 clk = (clk === 1'b0);
+
+    wire led1, led2, led3, led4, led5;
+
+    chip uut (
+        .io_0_8_1(clk),
+        .io_13_12_1(led1),
+        .io_13_12_0(led2),
+        .io_13_11_1(led3),
+        .io_13_11_0(led4),
+        .io_13_9_1(led5)
+    );
+
+    initial begin
+        // $dumpfile("blinky_tb.vcd");
+        // $dumpvars(0, blinky_tb);
+        repeat (10) begin
+            repeat (900000) @(posedge clk);
+            $display(led1, led2, led3, led4, led5);
+        end
+        $finish;
+    end
+endmodule