aboutsummaryrefslogtreecommitdiffstats
path: root/ice40/chipdb.py
diff options
context:
space:
mode:
authorDavid Shah <davey1576@gmail.com>2018-06-20 13:10:40 +0200
committerDavid Shah <davey1576@gmail.com>2018-06-20 13:10:40 +0200
commitd5a032d00e83863222bc4f5407bb72c845697c1b (patch)
treefcf2e23184521b72fed70a11b1ba1089c278ad63 /ice40/chipdb.py
parentc667f640d50b8b6ac7c3c3a25f0990c1ba522ae3 (diff)
downloadnextpnr-d5a032d00e83863222bc4f5407bb72c845697c1b.tar.gz
nextpnr-d5a032d00e83863222bc4f5407bb72c845697c1b.tar.bz2
nextpnr-d5a032d00e83863222bc4f5407bb72c845697c1b.zip
Fix chipdb UltraPlus wires
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ice40/chipdb.py')
-rw-r--r--ice40/chipdb.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/ice40/chipdb.py b/ice40/chipdb.py
index 67d24713..82b8be8b 100644
--- a/ice40/chipdb.py
+++ b/ice40/chipdb.py
@@ -124,7 +124,7 @@ def wire_type(name):
wt = "LOCAL"
elif name in ("OUT_ENB", "cen", "inclk", "latch", "outclk", "clk", "s_r", "carry_in", "carry_in_mux"):
wt = "LOCAL"
- elif name in ("in_0", "in_1", "in_2", "in_3", "cout", "lout", "out", "fabout"):
+ elif name in ("in_0", "in_1", "in_2", "in_3", "cout", "lout", "out", "fabout") or name.startswith("slf_op") or name.startswith("O_"):
wt = "LOCAL"
elif name.startswith("local_g") or name.startswith("glb2local_"):
wt = "LOCAL"