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authorDavid Shah <davey1576@gmail.com>2018-07-19 11:14:43 +0200
committerDavid Shah <davey1576@gmail.com>2018-07-19 11:14:43 +0200
commitb0d9b994eb211f4c4060f6b9802ea5692512e08c (patch)
treef3c3733c4cee0d1fcaccaf3f502b08f642e58f46 /ice40/arch.h
parent2df7e130fbc18c81840a841b16f4780fbcfda34a (diff)
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ice40: Adding data for extra cell configuration
Signed-off-by: David Shah <davey1576@gmail.com>
Diffstat (limited to 'ice40/arch.h')
-rw-r--r--ice40/arch.h18
1 files changed, 17 insertions, 1 deletions
diff --git a/ice40/arch.h b/ice40/arch.h
index f0f734ce..3b6d23dc 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -153,15 +153,31 @@ NPNR_PACKED_STRUCT(struct BitstreamInfoPOD {
RelPtr<IerenInfoPOD> ierens;
});
+NPNR_PACKED_STRUCT(struct BelConfigEntryPOD {
+ RelPtr<char> entry_name;
+ RelPtr<char> cbit_name;
+ int8_t x, y;
+ int16_t padding;
+});
+
+// Stores mapping between bel parameters and config bits,
+// for extra cells where this mapping is non-trivial
+NPNR_PACKED_STRUCT(struct BelConfigPOD {
+ int32_t bel_index;
+ int32_t num_entries;
+ RelPtr<BelConfigEntryPOD> entries;
+});
+
NPNR_PACKED_STRUCT(struct ChipInfoPOD {
int32_t width, height;
int32_t num_bels, num_wires, num_pips;
- int32_t num_switches, num_packages;
+ int32_t num_switches, num_belcfgs, num_packages;
RelPtr<BelInfoPOD> bel_data;
RelPtr<WireInfoPOD> wire_data;
RelPtr<PipInfoPOD> pip_data;
RelPtr<TileType> tile_grid;
RelPtr<BitstreamInfoPOD> bits_info;
+ RelPtr<BelConfigPOD> bel_config;
RelPtr<PackageInfoPOD> packages_data;
});