aboutsummaryrefslogtreecommitdiffstats
path: root/ice40/arch.cc
diff options
context:
space:
mode:
authorClifford Wolf <clifford@clifford.at>2018-07-30 15:35:40 +0200
committerClifford Wolf <clifford@clifford.at>2018-07-30 15:35:40 +0200
commit0daffec2a0efdbea36201eeb5666d208a10d0226 (patch)
treeeffbd8bfd41387213ee0ae3c899e1b25b47e4476 /ice40/arch.cc
parentb5f90d381481dc3658c408b162aa433e183f79f4 (diff)
downloadnextpnr-0daffec2a0efdbea36201eeb5666d208a10d0226.tar.gz
nextpnr-0daffec2a0efdbea36201eeb5666d208a10d0226.tar.bz2
nextpnr-0daffec2a0efdbea36201eeb5666d208a10d0226.zip
Add predictDelay Arch API
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'ice40/arch.cc')
-rw-r--r--ice40/arch.cc16
1 files changed, 16 insertions, 0 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc
index 3803f842..91c20b42 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -579,6 +579,22 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
int xd = x2 - x1, yd = y2 - y1;
int xscale = 120, yscale = 120, offset = 0;
+ return xscale * abs(xd) + yscale * abs(yd) + offset;
+}
+
+delay_t Arch::predictDelay(WireId src, WireId dst) const
+{
+ NPNR_ASSERT(src != WireId());
+ int x1 = chip_info->wire_data[src.index].x;
+ int y1 = chip_info->wire_data[src.index].y;
+
+ NPNR_ASSERT(dst != WireId());
+ int x2 = chip_info->wire_data[dst.index].x;
+ int y2 = chip_info->wire_data[dst.index].y;
+
+ int xd = x2 - x1, yd = y2 - y1;
+ int xscale = 120, yscale = 120, offset = 0;
+
// if (chip_info->wire_data[src.index].type == WIRE_TYPE_SP4_VERT) {
// yd = yd < -4 ? yd + 4 : (yd < 0 ? 0 : yd);
// offset = 500;