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| author | myrtle <gatecat@ds0.me> | 2023-01-27 11:20:35 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-01-27 11:20:35 +0100 |
| commit | d661d117af9b447a1ef6dc056742c521dbb33259 (patch) | |
| tree | 2e7578b8e3677cd946a2cc8254dfec35ba357558 /gowin/cells.h | |
| parent | 9b5e5f124c186942652e6be03c356cf0edf88124 (diff) | |
| parent | 2d45d57b3246814ad20988c6ecf941180faf58a6 (diff) | |
| download | nextpnr-d661d117af9b447a1ef6dc056742c521dbb33259.tar.gz nextpnr-d661d117af9b447a1ef6dc056742c521dbb33259.tar.bz2 nextpnr-d661d117af9b447a1ef6dc056742c521dbb33259.zip | |
Merge pull request #1085 from yrabbit/gw1nr-9c-pll
gowin: Add PLL support for the GW1NR-9C chip
Diffstat (limited to 'gowin/cells.h')
| -rw-r--r-- | gowin/cells.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/gowin/cells.h b/gowin/cells.h index 78a746f3..7aba4805 100644 --- a/gowin/cells.h +++ b/gowin/cells.h @@ -122,9 +122,8 @@ void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_l void gwio_to_iob(Context *ctx, CellInfo *nxio, CellInfo *sbio, pool<IdString> &todelete_cells); // Reconnect PLL signals (B) -void reconnect_pllvr(Context *ctx, CellInfo *pll, CellInfo *pllb); -void reconnect_rplla(Context *ctx, CellInfo *pll, CellInfo *pllb); -void reconnect_rpllb(Context *ctx, CellInfo *pll, CellInfo *pllb); +void reconnect_pllvr(Context *ctx, CellInfo *pll, CellInfo *new_pll); +void reconnect_rpll(Context *ctx, CellInfo *pll, CellInfo *new_pll); // Convert RAM16 to write port void sram_to_ramw_split(Context *ctx, CellInfo *ram, CellInfo *ramw); |