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| author | myrtle <gatecat@ds0.me> | 2022-07-21 11:34:51 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-07-21 11:34:51 +0100 |
| commit | 1b54fa2a1c1fae82315916f3b92f6282f376c861 (patch) | |
| tree | 483d8f5b1d13546f3294e813adf07a571d150a4a /gowin/cells.cc | |
| parent | dfea954754966fccb65ca30592ce8c15dad45267 (diff) | |
| parent | 0285d471381d42cfa68eca2af0e83d112c087728 (diff) | |
| download | nextpnr-1b54fa2a1c1fae82315916f3b92f6282f376c861.tar.gz nextpnr-1b54fa2a1c1fae82315916f3b92f6282f376c861.tar.bz2 nextpnr-1b54fa2a1c1fae82315916f3b92f6282f376c861.zip | |
Merge pull request #1004 from yrabbit/fix-muxes
gowin: Remove incomprehensible names of the muxes
Diffstat (limited to 'gowin/cells.cc')
| -rw-r--r-- | gowin/cells.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gowin/cells.cc b/gowin/cells.cc index d83b07c8..0c027d38 100644 --- a/gowin/cells.cc +++ b/gowin/cells.cc @@ -56,8 +56,8 @@ std::unique_ptr<CellInfo> create_generic_cell(Context *ctx, IdString type, std:: new_cell->addInput(id_CLK); new_cell->addInput(id_CE); new_cell->addInput(id_LSR); - } else if (type == id_GW_MUX2_LUT5 || type == id_GW_MUX2_LUT6 || type == id_GW_MUX2_LUT7 || - type == id_GW_MUX2_LUT7 || type == id_GW_MUX2_LUT8) { + } else if (type == id_MUX2_LUT5 || type == id_MUX2_LUT6 || type == id_MUX2_LUT7 || type == id_MUX2_LUT7 || + type == id_MUX2_LUT8) { new_cell->addInput(id_I0); new_cell->addInput(id_I1); new_cell->addInput(id_SEL); @@ -190,7 +190,7 @@ void sram_to_ramw_split(Context *ctx, CellInfo *ram, CellInfo *ramw) ram->movePortTo(ctx->id("DI[1]"), ramw, id_B5); ram->movePortTo(ctx->id("DI[2]"), ramw, id_C5); ram->movePortTo(ctx->id("DI[3]"), ramw, id_D5); - + ram->movePortTo(ctx->id("CLK"), ramw, id_CLK); ram->movePortTo(ctx->id("WRE"), ramw, id_LSR); } |