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author | YRabbit <rabbit@yrabbit.cyou> | 2022-11-10 19:14:41 +1000 |
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committer | YRabbit <rabbit@yrabbit.cyou> | 2022-11-10 19:14:41 +1000 |
commit | a84ded4793ce66b0f4854349c929afae334d1e56 (patch) | |
tree | 53451f52123c43d3c6cf0f49c73f46627263b21e /gowin/arch.h | |
parent | ac17c36bec5b0ae8d57b66f825acb6f21f2ca323 (diff) | |
download | nextpnr-a84ded4793ce66b0f4854349c929afae334d1e56.tar.gz nextpnr-a84ded4793ce66b0f4854349c929afae334d1e56.tar.bz2 nextpnr-a84ded4793ce66b0f4854349c929afae334d1e56.zip |
gowin: add initial PLL support
The rPLL primitive for the simplest chip (GW1N-1) in the family is
processed. All parameters of the primitive are passed on to gowin_pack,
and general-purpose wires are used for routing outputs of the primitive.
Compatible with older versions of apicula, but in this case will refuse
to place the new primitive.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Diffstat (limited to 'gowin/arch.h')
-rw-r--r-- | gowin/arch.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/gowin/arch.h b/gowin/arch.h index a1fc25ae..994b6d98 100644 --- a/gowin/arch.h +++ b/gowin/arch.h @@ -468,6 +468,7 @@ struct Arch : BaseArch<ArchRanges> void pre_pack(Context *ctx); void post_pack(Context *ctx); void auto_longwires(); + void add_plla_ports(BelsPOD const *bel, IdString belname, int row, int col); GowinGlobalRouter globals_router; void mark_gowin_globals(Context *ctx); @@ -507,7 +508,8 @@ enum gnd_0_z = 278, // virtual VSS bel Z osc_z = 280, // Z for the oscillator bels bufs_0_z = 281, // Z for long wire buffer bel - free_z = 289 // Must be the last, one can use z starting from this value, adjust accordingly. + pll_z = 289, // PLL + free_z = 290 // Must be the last, one can use z starting from this value, adjust accordingly. }; } |