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| author | myrtle <gatecat@ds0.me> | 2023-02-02 08:30:56 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-02-02 08:30:56 +0000 |
| commit | 48b0025732f7b5b1b7b091691bb5a26634ae5069 (patch) | |
| tree | 77052038427be7cf713ba6378f01df539f2e4688 /gowin/arch.h | |
| parent | f328130c0a4cf562ce358d5e2a2a39f3d3dbef5e (diff) | |
| parent | 2edc77836dd7686c4deabffcd7b6ebb4a75fdce1 (diff) | |
| download | nextpnr-48b0025732f7b5b1b7b091691bb5a26634ae5069.tar.gz nextpnr-48b0025732f7b5b1b7b091691bb5a26634ae5069.tar.bz2 nextpnr-48b0025732f7b5b1b7b091691bb5a26634ae5069.zip | |
Merge pull request #1087 from yrabbit/gw1nr-9
gowin: Add PLL support for the GW1NR-9 chip
Diffstat (limited to 'gowin/arch.h')
| -rw-r--r-- | gowin/arch.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/gowin/arch.h b/gowin/arch.h index f060165a..822cdfc1 100644 --- a/gowin/arch.h +++ b/gowin/arch.h @@ -283,6 +283,12 @@ struct ArchRanges : BaseArchRanges using GroupGroupsRangeT = const std::vector<GroupId> &; }; +enum class PLL // fixed PLL locations +{ + left, + right +}; + struct Arch : BaseArch<ArchRanges> { std::string family; @@ -482,6 +488,7 @@ struct Arch : BaseArch<ArchRanges> void add_rpll_ports(DatabasePOD const *db, BelsPOD const *bel, IdString belname, int row, int col); void fix_pll_nets(Context *ctx); bool is_GCLKT_iob(const CellInfo *cell); + void bind_pll_to_bel(CellInfo *ci, PLL loc); GowinGlobalRouter globals_router; void mark_gowin_globals(Context *ctx); |