gowin: add PLL pins processing

Uses the information of the special input pins for the PLL in the
current chip. If such pins are involved, no routing is performed and
information about the use of implicit wires is passed to the packer.

The RESET and RESET_P inputs are now also disabled if they are connected
to VSS/VCC.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>

1 files changed, 4 insertions, 0 deletions

diff --git a/gowin/arch.h b/gowin/arch.h
index 0591e41a..3e614eba 100644
--- a/gowin/arch.h
+++ b/gowin/arch.h
@@ -227,6 +227,7 @@ struct BelInfo
     std::map<IdString, std::string> attrs;
     CellInfo *bound_cell;
     dict<IdString, PinInfo> pins;
+    std::vector<IdString> pin_cfgs;
     DecalXY decalxy_active, decalxy_inactive;
     int x, y, z;
     bool gb;
@@ -474,8 +475,11 @@ struct Arch : BaseArch<ArchRanges>
     void fix_longwire_bels();
     void pre_pack(Context *ctx);
     void post_pack(Context *ctx);
+    void pre_route(Context *ctx);
+    void post_route(Context *ctx);
     void auto_longwires();
     void add_plla_ports(BelsPOD const *bel, IdString belname, int row, int col);
+    void fix_pll_nets(Context *ctx);
 
     GowinGlobalRouter globals_router;
     void mark_gowin_globals(Context *ctx);