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| author | Pepijn de Vos <pepijndevos@gmail.com> | 2019-11-08 17:15:12 +0100 |
|---|---|---|
| committer | Pepijn de Vos <pepijndevos@gmail.com> | 2019-11-08 17:15:12 +0100 |
| commit | 5dd1e5e51e65d1efdd2f84c10a2b751e3228b982 (patch) | |
| tree | 05cdf97d035fcafc75e72c2a7fd8d0aac6b6b2d7 /generic/synth/prims.v | |
| parent | 7c362f292c0807b1e781922c79af94fd8b82477c (diff) | |
| download | nextpnr-5dd1e5e51e65d1efdd2f84c10a2b751e3228b982.tar.gz nextpnr-5dd1e5e51e65d1efdd2f84c10a2b751e3228b982.tar.bz2 nextpnr-5dd1e5e51e65d1efdd2f84c10a2b751e3228b982.zip | |
return FF_USED, formatting, correct INIT
Diffstat (limited to 'generic/synth/prims.v')
| -rw-r--r-- | generic/synth/prims.v | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/generic/synth/prims.v b/generic/synth/prims.v index 47a5df0f..acce585c 100644 --- a/generic/synth/prims.v +++ b/generic/synth/prims.v @@ -21,19 +21,20 @@ endmodule module GENERIC_SLICE #( parameter K = 4, parameter [2**K-1:0] INIT = 0, + parameter FF_USED = 1'b0 ) ( input CLK, input [K-1:0] I, output F, output Q ); - wire f_wire; + wire f_wire; LUT #(.K(K), .INIT(INIT)) lut_i(.I(I), .Q(f_wire)); - DFF dff_i(.CLK(CLK), .D(f_wire), .Q(Q)); + DFF dff_i(.CLK(CLK), .D(f_wire), .Q(Q)); - assign F = f_wire; + assign F = f_wire; endmodule module GENERIC_IOB #( |