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authorEddie Hung <eddieh@ece.ubc.ca>2018-07-30 19:19:30 -0700
committerEddie Hung <eddieh@ece.ubc.ca>2018-07-30 21:51:30 -0700
commita82f6f410595de26e82eaf4818e41036f0bc2f9c (patch)
tree22620c1be70ce79387d8309ccb46aceb295db0fa /generic/arch.cc
parente4b044da52ce7d8fed2e461bec09c86cb293566d (diff)
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Modify predictDelay signature
Diffstat (limited to 'generic/arch.cc')
-rw-r--r--generic/arch.cc12
1 files changed, 7 insertions, 5 deletions
diff --git a/generic/arch.cc b/generic/arch.cc
index 8ef37716..4469a828 100644
--- a/generic/arch.cc
+++ b/generic/arch.cc
@@ -403,12 +403,14 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
return (dx + dy) * grid_distance_to_delay;
}
-delay_t Arch::predictDelay(WireId src, WireId dst) const
+delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const;
{
- const WireInfo &s = wires.at(src);
- const WireInfo &d = wires.at(dst);
- int dx = abs(s.x - d.x);
- int dy = abs(s.y - d.y);
+ const auto& driver = net_info->driver;
+ auto driver_loc = getBelLocation(driver.cell->bel);
+ auto sink_loc = getBelLocation(sink.cell->bel);
+
+ int dx = abs(driver_loc.x - driver_loc.x);
+ int dy = abs(sink_loc.y - sink_locy);
return (dx + dy) * grid_distance_to_delay;
}