aboutsummaryrefslogtreecommitdiffstats
path: root/generic/arch.cc
diff options
context:
space:
mode:
authorgatecat <gatecat@ds0.me>2022-02-18 10:52:37 +0000
committergatecat <gatecat@ds0.me>2022-02-18 11:13:18 +0000
commit6a32aca4ac8705b637943c236cedd2f36422fb21 (patch)
tree28483964fb3c92bc104ab6162d1c9196651ced26 /generic/arch.cc
parent61d1db16be2c68cf6ae8b4d2ff3266b5c7086ad2 (diff)
downloadnextpnr-6a32aca4ac8705b637943c236cedd2f36422fb21.tar.gz
nextpnr-6a32aca4ac8705b637943c236cedd2f36422fb21.tar.bz2
nextpnr-6a32aca4ac8705b637943c236cedd2f36422fb21.zip
refactor: New member functions to replace design_utils
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'generic/arch.cc')
-rw-r--r--generic/arch.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/generic/arch.cc b/generic/arch.cc
index ad054efd..c4814bab 100644
--- a/generic/arch.cc
+++ b/generic/arch.cc
@@ -721,7 +721,7 @@ void Arch::assignArchInfo()
CellInfo *ci = cell.second.get();
if (ci->type == id("GENERIC_SLICE")) {
ci->is_slice = true;
- ci->slice_clk = get_net_or_empty(ci, id("CLK"));
+ ci->slice_clk = ci->getPort(id("CLK"));
} else {
ci->is_slice = false;
}