diff options
| author | gatecat <gatecat@ds0.me> | 2021-07-12 11:30:21 +0100 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2021-07-12 11:30:21 +0100 |
| commit | 96a588505179c1d76a15119a6c8f719910f020cc (patch) | |
| tree | 1ee7b818f44ee7030f38a4f4587fe2cde1ddc21d /fpga_interchange | |
| parent | a63e7b3db8875c0eec25029cdbbacc473e890894 (diff) | |
| download | nextpnr-96a588505179c1d76a15119a6c8f719910f020cc.tar.gz nextpnr-96a588505179c1d76a15119a6c8f719910f020cc.tar.bz2 nextpnr-96a588505179c1d76a15119a6c8f719910f020cc.zip | |
interchange: Place DIFFINBUF and IBUFCTRL for UltraScale+ IBUFDS
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'fpga_interchange')
| -rw-r--r-- | fpga_interchange/arch_pack_io.cc | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/fpga_interchange/arch_pack_io.cc b/fpga_interchange/arch_pack_io.cc index 19d8cece..b018c6bd 100644 --- a/fpga_interchange/arch_pack_io.cc +++ b/fpga_interchange/arch_pack_io.cc @@ -55,8 +55,6 @@ bool search_routing_for_placement(Arch *arch, WireId start_wire, CellInfo *cell, WireId dst = downhill ? arch->getPipDstWire(pip) : arch->getPipSrcWire(pip); if (already_visited.count(dst)) return; - if (!arch->is_site_wire(dst) && arch->get_wire_category(dst) == WIRE_CAT_GENERAL) - return; // this pass only considers dedicated routing visit_queue.push(dst); already_visited.insert(dst); }; @@ -83,6 +81,7 @@ void Arch::place_iobufs(WireId pad_wire, NetInfo *net, if (ctx->verbose) log_info("Placed IO cell %s:%s at %s.\n", ctx->nameOf(cell_port.first), ctx->nameOf(cell_port.first->type), ctx->nameOfBel(cell_port.first->bel)); + placed_cells->insert(cell_port.first); } } @@ -246,7 +245,9 @@ void Arch::pack_ports() } if (possible_site_types.empty()) { - log_error("Port '%s' has no possible site types!\n", port_name.c_str(getCtx())); + if (getCtx()->verbose) + log_info("Port '%s' has no possible site types, falling back to all types!\n", port_name.c_str(getCtx())); + possible_site_types = package_pin_site_types; } if (getCtx()->verbose) { |