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authorMaciej Kurc <mkurc@antmicro.com>2021-07-16 14:55:45 +0200
committerMaciej Kurc <mkurc@antmicro.com>2021-07-16 14:55:45 +0200
commit857961a6bb9302847ecf605971015f1610dae476 (patch)
treeb46e41701e8495af27290893ff0c543d69b47b79 /fpga_interchange
parent0336f55b16373874cf4ac5661d9724d0a358454c (diff)
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Migrated C arrays to std::array containers.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
Diffstat (limited to 'fpga_interchange')
-rw-r--r--fpga_interchange/site_lut_mapping_cache.cc3
-rw-r--r--fpga_interchange/site_lut_mapping_cache.h37
2 files changed, 31 insertions, 9 deletions
diff --git a/fpga_interchange/site_lut_mapping_cache.cc b/fpga_interchange/site_lut_mapping_cache.cc
index 44a72772..3796d7ab 100644
--- a/fpga_interchange/site_lut_mapping_cache.cc
+++ b/fpga_interchange/site_lut_mapping_cache.cc
@@ -75,8 +75,7 @@ SiteLutMappingKey SiteLutMappingKey::create (const SiteInformation& siteInfo) {
cell.type = cellInfo->type;
cell.belIndex = cellInfo->bel.index;
- memset((void*)cell.conns, 0,
- sizeof(int32_t) * SiteLutMappingKey::MAX_LUT_INPUTS);
+ cell.conns.fill(0);
size_t portId = 0;
for (const auto& port : cellInfo->ports) {
diff --git a/fpga_interchange/site_lut_mapping_cache.h b/fpga_interchange/site_lut_mapping_cache.h
index df1ce474..42a10ba7 100644
--- a/fpga_interchange/site_lut_mapping_cache.h
+++ b/fpga_interchange/site_lut_mapping_cache.h
@@ -41,13 +41,25 @@ struct SiteLutMappingKey {
// Port to net assignments. These are local net ids generated during
// key creation. This is to abstract connections from actual design
// net names. the Id 0 means unconnected.
- int32_t conns [MAX_LUT_INPUTS];
+ std::array<int32_t, MAX_LUT_INPUTS> conns;
+
+ bool operator == (const Cell& other) const {
+ return (type == other.type) &&
+ (belIndex == other.belIndex) &&
+ (conns == other.conns);
+ }
+
+ bool operator != (const Cell& other) const {
+ return (type != other.type) ||
+ (belIndex != other.belIndex) ||
+ (conns != other.conns);
+ }
};
int32_t tileType; // Tile type
int32_t siteType; // Site type in that tile type
size_t numCells; // LUT cell count
- Cell cells[MAX_LUT_CELLS]; // LUT cell data
+ std::array<Cell, MAX_LUT_CELLS> cells; // LUT cell data
unsigned int hash_; // Precomputed hash
@@ -66,21 +78,32 @@ struct SiteLutMappingKey {
}
}
}
-
+
+ bool compareCells (const SiteLutMappingKey &other) const {
+ if (numCells != other.numCells) {
+ return false;
+ }
+
+ for (size_t i=0; i<numCells; ++i) {
+ if (cells[i] != other.cells[i]) {
+ return false;
+ }
+ }
+ return true;
+ }
+
bool operator == (const SiteLutMappingKey &other) const {
return (hash_ == other.hash_) &&
(tileType == other.tileType) &&
(siteType == other.siteType) &&
- (numCells == other.numCells) &&
- (!memcmp(cells, other.cells, sizeof(Cell) * numCells));
+ compareCells(other);
}
bool operator != (const SiteLutMappingKey &other) const {
return (hash_ != other.hash_) ||
(tileType != other.tileType) ||
(siteType != other.siteType) ||
- (numCells != other.numCells) ||
- (memcmp(cells, other.cells, sizeof(Cell) * numCells));
+ !compareCells(other);
}
unsigned int hash () const {