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| author | gatecat <gatecat@ds0.me> | 2022-03-03 21:53:26 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-03-03 21:53:26 +0000 |
| commit | 2c6ca4836fd30faa5cdbd931a352866e5a04104d (patch) | |
| tree | 50c2c44d8ee36cfbcb765b04912ee8fb678248d9 /fpga_interchange/site_lut_mapping_cache.h | |
| parent | 0a70b9c992c06a7553725b3742052eb95abd5f20 (diff) | |
| parent | cc9f99a80c9aa9b69bc2a54060b5fbcec799f145 (diff) | |
| download | nextpnr-2c6ca4836fd30faa5cdbd931a352866e5a04104d.tar.gz nextpnr-2c6ca4836fd30faa5cdbd931a352866e5a04104d.tar.bz2 nextpnr-2c6ca4836fd30faa5cdbd931a352866e5a04104d.zip | |
Merge pull request #929 from gatecat/gatecat/parallel_refine
parallel_refine: New, parallelised placement refinement pass
Diffstat (limited to 'fpga_interchange/site_lut_mapping_cache.h')
0 files changed, 0 insertions, 0 deletions