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| author | Maciej Kurc <mkurc@antmicro.com> | 2021-07-16 16:01:21 +0200 |
|---|---|---|
| committer | Maciej Kurc <mkurc@antmicro.com> | 2021-07-22 12:59:10 +0200 |
| commit | 8fc16a57c9dee5e7e0f83752a62612f70f18a38e (patch) | |
| tree | ac90d66d237215ef241bb05dd2781948bc8f4a75 /fpga_interchange/luts.h | |
| parent | ccf2bb123c4c2f52142c82c3b6338856df4fbb80 (diff) | |
| download | nextpnr-8fc16a57c9dee5e7e0f83752a62612f70f18a38e.tar.gz nextpnr-8fc16a57c9dee5e7e0f83752a62612f70f18a38e.tar.bz2 nextpnr-8fc16a57c9dee5e7e0f83752a62612f70f18a38e.zip | |
Added more code comments, formatted the code
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
Diffstat (limited to 'fpga_interchange/luts.h')
| -rw-r--r-- | fpga_interchange/luts.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/fpga_interchange/luts.h b/fpga_interchange/luts.h index 7b6ce758..8f33507a 100644 --- a/fpga_interchange/luts.h +++ b/fpga_interchange/luts.h @@ -70,12 +70,12 @@ struct LutBel struct SiteLutMapping { - struct LutCellMapping { + struct LutCellMapping + { LutCell lut_cell; }; }; - // Work forward from cell definition and cell -> bel pin map and check that // equation is valid. void check_equation(const LutCell &lut_cell, const dict<IdString, IdString> &cell_to_bel_map, const LutBel &lut_bel, @@ -99,7 +99,8 @@ struct LutMapper std::vector<CellInfo *> cells; - bool remap_luts(const Context *ctx, SiteLutMappingResult* lut_mapping, pool<const LutBel *, hash_ptr_ops> *blocked_luts); + bool remap_luts(const Context *ctx, SiteLutMappingResult *lut_mapping, + pool<const LutBel *, hash_ptr_ops> *blocked_luts); // Determine which wires given the current mapping must be tied to the // default constant. |