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author | Keith Rothman <537074+litghost@users.noreply.github.com> | 2021-04-01 13:18:07 -0700 |
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committer | Keith Rothman <537074+litghost@users.noreply.github.com> | 2021-04-06 10:42:05 -0700 |
commit | 0d41fff3a70a298036aa6fdc103093631998a2bd (patch) | |
tree | bbe5f6ebd81b70adc66f907383c9416f154712aa /fpga_interchange/luts.h | |
parent | a519341112e86ae63df2c54e8b1f556f4f486aeb (diff) | |
download | nextpnr-0d41fff3a70a298036aa6fdc103093631998a2bd.tar.gz nextpnr-0d41fff3a70a298036aa6fdc103093631998a2bd.tar.bz2 nextpnr-0d41fff3a70a298036aa6fdc103093631998a2bd.zip |
[interchange] Add crude pseudo pip model.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
Diffstat (limited to 'fpga_interchange/luts.h')
-rw-r--r-- | fpga_interchange/luts.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/fpga_interchange/luts.h b/fpga_interchange/luts.h index 5a46b3ed..6978c7d2 100644 --- a/fpga_interchange/luts.h +++ b/fpga_interchange/luts.h @@ -92,8 +92,18 @@ struct LutMapper std::vector<CellInfo *> cells; bool remap_luts(const Context *ctx); + + // Determine which wires given the current mapping must be tied to the + // default constant. + // + // Returns a bit mask, 1 meaning it must be tied. Otherwise means that + // the pin is free to be a signal. uint32_t check_wires(const std::vector<std::vector<int32_t>> &bel_to_cell_pin_remaps, const std::vector<const LutBel *> &lut_bels, uint32_t used_pins) const; + + // Version of check_wires that uses current state of cells based on pin + // mapping in cells variable. + uint32_t check_wires(const Context *ctx) const; }; // Rotate and merge a LUT equation into an array of levels. |