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| author | gatecat <gatecat@ds0.me> | 2021-05-07 11:24:08 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-05-07 11:24:08 +0100 |
| commit | 432b9d8bde2faf9fbcc39ab0b82d02ce5115cdc8 (patch) | |
| tree | 18902d57752d701319aa01ac92810ea7784f9fd3 /fpga_interchange/chipdb.h | |
| parent | 3144e8395044da05476bbeee2f12fb7735864b17 (diff) | |
| parent | 51949d95c3dbc2809eebfccbd60532915f401a42 (diff) | |
| download | nextpnr-432b9d8bde2faf9fbcc39ab0b82d02ce5115cdc8.tar.gz nextpnr-432b9d8bde2faf9fbcc39ab0b82d02ce5115cdc8.tar.bz2 nextpnr-432b9d8bde2faf9fbcc39ab0b82d02ce5115cdc8.zip | |
Merge pull request #694 from YosysHQ/gatecat/interchange-glbroute
interchange: Initial global routing implementation
Diffstat (limited to 'fpga_interchange/chipdb.h')
| -rw-r--r-- | fpga_interchange/chipdb.h | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/fpga_interchange/chipdb.h b/fpga_interchange/chipdb.h index e9cac84e..d38e5d2f 100644 --- a/fpga_interchange/chipdb.h +++ b/fpga_interchange/chipdb.h @@ -34,7 +34,7 @@ NEXTPNR_NAMESPACE_BEGIN * kExpectedChipInfoVersion */ -static constexpr int32_t kExpectedChipInfoVersion = 8; +static constexpr int32_t kExpectedChipInfoVersion = 9; // Flattened site indexing. // @@ -320,6 +320,18 @@ NPNR_PACKED_STRUCT(struct WireTypePOD { int32_t category; // WireCategory }); +NPNR_PACKED_STRUCT(struct GlobalCellPinPOD { + int32_t name; // constid + int16_t max_hops; // max routing hops to try + int8_t guide_placement; + int8_t force_routing; +}); + +NPNR_PACKED_STRUCT(struct GlobalCellPOD { + int32_t cell_type; + RelSlice<GlobalCellPinPOD> pins; +}); + NPNR_PACKED_STRUCT(struct ChipInfoPOD { RelPtr<char> name; RelPtr<char> generator; @@ -333,6 +345,7 @@ NPNR_PACKED_STRUCT(struct ChipInfoPOD { RelSlice<NodeInfoPOD> nodes; RelSlice<PackagePOD> packages; RelSlice<WireTypePOD> wire_types; + RelSlice<GlobalCellPOD> global_cells; // BEL bucket constids. RelSlice<int32_t> bel_buckets; |