Merge remote-tracking branch 'origin/master' into common_main

# Conflicts:
#	ecp5/main.cc
#	ice40/main.cc

5 files changed, 68 insertions, 71 deletions

diff --git a/ecp5/arch.cc b/ecp5/arch.cc
index 377b8665..d2d62241 100644
--- a/ecp5/arch.cc
+++ b/ecp5/arch.cc
@@ -422,7 +422,7 @@ delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const
     return 200 * (abs(driver_loc.x - sink_loc.x) + abs(driver_loc.y - sink_loc.y));
 }
 
-delay_t Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t budget) const { return budget; }
+bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const { return false; }
 
 // -----------------------------------------------------------------------
 
@@ -479,7 +479,7 @@ DecalXY Arch::getBelDecal(BelId bel) const
     decalxy.decal.type = DecalId::TYPE_BEL;
     decalxy.decal.location = bel.location;
     decalxy.decal.z = bel.index;
-    decalxy.decal.active = bel_to_cell.count(bel) && (bel_to_cell.at(bel) != IdString());
+    decalxy.decal.active = bel_to_cell.count(bel) && (bel_to_cell.at(bel) != nullptr);
     return decalxy;
 }
 
diff --git a/ecp5/arch.h b/ecp5/arch.h
index 223f1ec5..55c1caa1 100644
--- a/ecp5/arch.h
+++ b/ecp5/arch.h
@@ -404,10 +404,9 @@ struct Arch : BaseCtx
     mutable std::unordered_map<IdString, WireId> wire_by_name;
     mutable std::unordered_map<IdString, PipId> pip_by_name;
 
-    std::unordered_map<BelId, IdString> bel_to_cell;
-    std::unordered_map<WireId, IdString> wire_to_net;
-    std::unordered_map<PipId, IdString> pip_to_net;
-    std::unordered_map<PipId, IdString> switches_locked;
+    std::unordered_map<BelId, CellInfo *> bel_to_cell;
+    std::unordered_map<WireId, NetInfo *> wire_to_net;
+    std::unordered_map<PipId, NetInfo *> pip_to_net;
 
     ArchArgs args;
     Arch(ArchArgs args);
@@ -448,23 +447,23 @@ struct Arch : BaseCtx
 
     uint32_t getBelChecksum(BelId bel) const { return bel.index; }
 
-    void bindBel(BelId bel, IdString cell, PlaceStrength strength)
+    void bindBel(BelId bel, CellInfo *cell, PlaceStrength strength)
     {
         NPNR_ASSERT(bel != BelId());
-        NPNR_ASSERT(bel_to_cell[bel] == IdString());
+        NPNR_ASSERT(bel_to_cell[bel] == nullptr);
         bel_to_cell[bel] = cell;
-        cells[cell]->bel = bel;
-        cells[cell]->belStrength = strength;
+        cell->bel = bel;
+        cell->belStrength = strength;
         refreshUiBel(bel);
     }
 
     void unbindBel(BelId bel)
     {
         NPNR_ASSERT(bel != BelId());
-        NPNR_ASSERT(bel_to_cell[bel] != IdString());
-        cells[bel_to_cell[bel]]->bel = BelId();
-        cells[bel_to_cell[bel]]->belStrength = STRENGTH_NONE;
-        bel_to_cell[bel] = IdString();
+        NPNR_ASSERT(bel_to_cell[bel] != nullptr);
+        bel_to_cell[bel]->bel = BelId();
+        bel_to_cell[bel]->belStrength = STRENGTH_NONE;
+        bel_to_cell[bel] = nullptr;
         refreshUiBel(bel);
     }
 
@@ -485,23 +484,23 @@ struct Arch : BaseCtx
     bool checkBelAvail(BelId bel) const
     {
         NPNR_ASSERT(bel != BelId());
-        return bel_to_cell.find(bel) == bel_to_cell.end() || bel_to_cell.at(bel) == IdString();
+        return bel_to_cell.find(bel) == bel_to_cell.end() || bel_to_cell.at(bel) == nullptr;
     }
 
-    IdString getBoundBelCell(BelId bel) const
+    CellInfo *getBoundBelCell(BelId bel) const
     {
         NPNR_ASSERT(bel != BelId());
         if (bel_to_cell.find(bel) == bel_to_cell.end())
-            return IdString();
+            return nullptr;
         else
             return bel_to_cell.at(bel);
     }
 
-    IdString getConflictingBelCell(BelId bel) const
+    CellInfo *getConflictingBelCell(BelId bel) const
     {
         NPNR_ASSERT(bel != BelId());
         if (bel_to_cell.find(bel) == bel_to_cell.end())
-            return IdString();
+            return nullptr;
         else
             return bel_to_cell.at(bel);
     }
@@ -558,53 +557,53 @@ struct Arch : BaseCtx
 
     uint32_t getWireChecksum(WireId wire) const { return wire.index; }
 
-    void bindWire(WireId wire, IdString net, PlaceStrength strength)
+    void bindWire(WireId wire, NetInfo *net, PlaceStrength strength)
     {
         NPNR_ASSERT(wire != WireId());
-        NPNR_ASSERT(wire_to_net[wire] == IdString());
+        NPNR_ASSERT(wire_to_net[wire] == nullptr);
         wire_to_net[wire] = net;
-        nets[net]->wires[wire].pip = PipId();
-        nets[net]->wires[wire].strength = strength;
+        net->wires[wire].pip = PipId();
+        net->wires[wire].strength = strength;
     }
 
     void unbindWire(WireId wire)
     {
         NPNR_ASSERT(wire != WireId());
-        NPNR_ASSERT(wire_to_net[wire] != IdString());
+        NPNR_ASSERT(wire_to_net[wire] != nullptr);
 
-        auto &net_wires = nets[wire_to_net[wire]]->wires;
+        auto &net_wires = wire_to_net[wire]->wires;
         auto it = net_wires.find(wire);
         NPNR_ASSERT(it != net_wires.end());
 
         auto pip = it->second.pip;
         if (pip != PipId()) {
-            pip_to_net[pip] = IdString();
+            pip_to_net[pip] = nullptr;
         }
 
         net_wires.erase(it);
-        wire_to_net[wire] = IdString();
+        wire_to_net[wire] = nullptr;
     }
 
     bool checkWireAvail(WireId wire) const
     {
         NPNR_ASSERT(wire != WireId());
-        return wire_to_net.find(wire) == wire_to_net.end() || wire_to_net.at(wire) == IdString();
+        return wire_to_net.find(wire) == wire_to_net.end() || wire_to_net.at(wire) == nullptr;
     }
 
-    IdString getBoundWireNet(WireId wire) const
+    NetInfo *getBoundWireNet(WireId wire) const
     {
         NPNR_ASSERT(wire != WireId());
         if (wire_to_net.find(wire) == wire_to_net.end())
-            return IdString();
+            return nullptr;
         else
             return wire_to_net.at(wire);
     }
 
-    IdString getConflictingWireNet(WireId wire) const
+    NetInfo *getConflictingWireNet(WireId wire) const
     {
         NPNR_ASSERT(wire != WireId());
         if (wire_to_net.find(wire) == wire_to_net.end())
-            return IdString();
+            return nullptr;
         else
             return wire_to_net.at(wire);
     }
@@ -638,57 +637,57 @@ struct Arch : BaseCtx
 
     uint32_t getPipChecksum(PipId pip) const { return pip.index; }
 
-    void bindPip(PipId pip, IdString net, PlaceStrength strength)
+    void bindPip(PipId pip, NetInfo *net, PlaceStrength strength)
     {
         NPNR_ASSERT(pip != PipId());
-        NPNR_ASSERT(pip_to_net[pip] == IdString());
+        NPNR_ASSERT(pip_to_net[pip] == nullptr);
 
         pip_to_net[pip] = net;
 
         WireId dst;
         dst.index = locInfo(pip)->pip_data[pip.index].dst_idx;
         dst.location = pip.location + locInfo(pip)->pip_data[pip.index].rel_dst_loc;
-        NPNR_ASSERT(wire_to_net[dst] == IdString());
+        NPNR_ASSERT(wire_to_net[dst] == nullptr);
         wire_to_net[dst] = net;
-        nets[net]->wires[dst].pip = pip;
-        nets[net]->wires[dst].strength = strength;
+        net->wires[dst].pip = pip;
+        net->wires[dst].strength = strength;
     }
 
     void unbindPip(PipId pip)
     {
         NPNR_ASSERT(pip != PipId());
-        NPNR_ASSERT(pip_to_net[pip] != IdString());
+        NPNR_ASSERT(pip_to_net[pip] != nullptr);
 
         WireId dst;
         dst.index = locInfo(pip)->pip_data[pip.index].dst_idx;
         dst.location = pip.location + locInfo(pip)->pip_data[pip.index].rel_dst_loc;
-        NPNR_ASSERT(wire_to_net[dst] != IdString());
-        wire_to_net[dst] = IdString();
-        nets[pip_to_net[pip]]->wires.erase(dst);
+        NPNR_ASSERT(wire_to_net[dst] != nullptr);
+        wire_to_net[dst] = nullptr;
+        pip_to_net[pip]->wires.erase(dst);
 
-        pip_to_net[pip] = IdString();
+        pip_to_net[pip] = nullptr;
     }
 
     bool checkPipAvail(PipId pip) const
     {
         NPNR_ASSERT(pip != PipId());
-        return pip_to_net.find(pip) == pip_to_net.end() || pip_to_net.at(pip) == IdString();
+        return pip_to_net.find(pip) == pip_to_net.end() || pip_to_net.at(pip) == nullptr;
     }
 
-    IdString getBoundPipNet(PipId pip) const
+    NetInfo *getBoundPipNet(PipId pip) const
     {
         NPNR_ASSERT(pip != PipId());
         if (pip_to_net.find(pip) == pip_to_net.end())
-            return IdString();
+            return nullptr;
         else
             return pip_to_net.at(pip);
     }
 
-    IdString getConflictingPipNet(PipId pip) const
+    NetInfo *getConflictingPipNet(PipId pip) const
     {
         NPNR_ASSERT(pip != PipId());
         if (pip_to_net.find(pip) == pip_to_net.end())
-            return IdString();
+            return nullptr;
         else
             return pip_to_net.at(pip);
     }
@@ -807,7 +806,7 @@ struct Arch : BaseCtx
     delay_t getRipupDelayPenalty() const { return 200; }
     float getDelayNS(delay_t v) const { return v * 0.001; }
     uint32_t getDelayChecksum(delay_t v) const { return v; }
-    delay_t getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t budget) const;
+    bool getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const;
 
     // -------------------------------------------------
 
diff --git a/ecp5/arch_place.cc b/ecp5/arch_place.cc
index 84432043..dee4f620 100644
--- a/ecp5/arch_place.cc
+++ b/ecp5/arch_place.cc
@@ -68,19 +68,18 @@ bool Arch::isBelLocationValid(BelId bel) const
         std::vector<const CellInfo *> bel_cells;
         Loc bel_loc = getBelLocation(bel);
         for (auto bel_other : getBelsByTile(bel_loc.x, bel_loc.y)) {
-            IdString cell_other = getBoundBelCell(bel_other);
-            if (cell_other != IdString()) {
-                const CellInfo *ci_other = cells.at(cell_other).get();
-                bel_cells.push_back(ci_other);
+            CellInfo *cell_other = getBoundBelCell(bel_other);
+            if (cell_other != nullptr) {
+                bel_cells.push_back(cell_other);
             }
         }
         return slicesCompatible(bel_cells);
     } else {
-        IdString cellId = getBoundBelCell(bel);
-        if (cellId == IdString())
+        CellInfo *cell = getBoundBelCell(bel);
+        if (cell == nullptr)
             return true;
         else
-            return isValidBelForCell(cells.at(cellId).get(), bel);
+            return isValidBelForCell(cell, bel);
     }
 }
 
@@ -92,10 +91,9 @@ bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const
         std::vector<const CellInfo *> bel_cells;
         Loc bel_loc = getBelLocation(bel);
         for (auto bel_other : getBelsByTile(bel_loc.x, bel_loc.y)) {
-            IdString cell_other = getBoundBelCell(bel_other);
-            if (cell_other != IdString() && bel_other != bel) {
-                const CellInfo *ci_other = cells.at(cell_other).get();
-                bel_cells.push_back(ci_other);
+            CellInfo *cell_other = getBoundBelCell(bel_other);
+            if (cell_other != nullptr && bel_other != bel) {
+                bel_cells.push_back(cell_other);
             }
         }
 
diff --git a/ecp5/arch_pybindings.cc b/ecp5/arch_pybindings.cc
index c261c3ec..1dc9945b 100644
--- a/ecp5/arch_pybindings.cc
+++ b/ecp5/arch_pybindings.cc
@@ -60,13 +60,13 @@ void arch_wrap_python()
     fn_wrapper_1a<Context, decltype(&Context::getBelChecksum), &Context::getBelChecksum, pass_through<uint32_t>,
                   conv_from_str<BelId>>::def_wrap(ctx_cls, "getBelChecksum");
     fn_wrapper_3a_v<Context, decltype(&Context::bindBel), &Context::bindBel, conv_from_str<BelId>,
-                    conv_from_str<IdString>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindBel");
+                    addr_and_unwrap<CellInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindBel");
     fn_wrapper_1a_v<Context, decltype(&Context::unbindBel), &Context::unbindBel, conv_from_str<BelId>>::def_wrap(
             ctx_cls, "unbindBel");
-    fn_wrapper_1a<Context, decltype(&Context::getBoundBelCell), &Context::getBoundBelCell, conv_to_str<IdString>,
+    fn_wrapper_1a<Context, decltype(&Context::getBoundBelCell), &Context::getBoundBelCell, deref_and_wrap<CellInfo>,
                   conv_from_str<BelId>>::def_wrap(ctx_cls, "getBoundBelCell");
     fn_wrapper_1a<Context, decltype(&Context::getConflictingBelCell), &Context::getConflictingBelCell,
-                  conv_to_str<IdString>, conv_from_str<BelId>>::def_wrap(ctx_cls, "getConflictingBelCell");
+                  deref_and_wrap<CellInfo>, conv_from_str<BelId>>::def_wrap(ctx_cls, "getConflictingBelCell");
     fn_wrapper_0a<Context, decltype(&Context::getBels), &Context::getBels, wrap_context<BelRange>>::def_wrap(ctx_cls,
                                                                                                              "getBels");
 
@@ -78,15 +78,15 @@ void arch_wrap_python()
     fn_wrapper_1a<Context, decltype(&Context::getWireChecksum), &Context::getWireChecksum, pass_through<uint32_t>,
                   conv_from_str<WireId>>::def_wrap(ctx_cls, "getWireChecksum");
     fn_wrapper_3a_v<Context, decltype(&Context::bindWire), &Context::bindWire, conv_from_str<WireId>,
-                    conv_from_str<IdString>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindWire");
+                    addr_and_unwrap<NetInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindWire");
     fn_wrapper_1a_v<Context, decltype(&Context::unbindWire), &Context::unbindWire, conv_from_str<WireId>>::def_wrap(
             ctx_cls, "unbindWire");
     fn_wrapper_1a<Context, decltype(&Context::checkWireAvail), &Context::checkWireAvail, pass_through<bool>,
                   conv_from_str<WireId>>::def_wrap(ctx_cls, "checkWireAvail");
-    fn_wrapper_1a<Context, decltype(&Context::getBoundWireNet), &Context::getBoundWireNet, conv_to_str<IdString>,
+    fn_wrapper_1a<Context, decltype(&Context::getBoundWireNet), &Context::getBoundWireNet, deref_and_wrap<NetInfo>,
                   conv_from_str<WireId>>::def_wrap(ctx_cls, "getBoundWireNet");
     fn_wrapper_1a<Context, decltype(&Context::getConflictingWireNet), &Context::getConflictingWireNet,
-                  conv_to_str<IdString>, conv_from_str<WireId>>::def_wrap(ctx_cls, "getConflictingWireNet");
+                  deref_and_wrap<NetInfo>, conv_from_str<WireId>>::def_wrap(ctx_cls, "getConflictingWireNet");
 
     fn_wrapper_0a<Context, decltype(&Context::getWires), &Context::getWires, wrap_context<WireRange>>::def_wrap(
             ctx_cls, "getWires");
@@ -96,15 +96,15 @@ void arch_wrap_python()
     fn_wrapper_1a<Context, decltype(&Context::getPipChecksum), &Context::getPipChecksum, pass_through<uint32_t>,
                   conv_from_str<PipId>>::def_wrap(ctx_cls, "getPipChecksum");
     fn_wrapper_3a_v<Context, decltype(&Context::bindPip), &Context::bindPip, conv_from_str<PipId>,
-                    conv_from_str<IdString>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindPip");
+                    addr_and_unwrap<NetInfo>, pass_through<PlaceStrength>>::def_wrap(ctx_cls, "bindPip");
     fn_wrapper_1a_v<Context, decltype(&Context::unbindPip), &Context::unbindPip, conv_from_str<PipId>>::def_wrap(
             ctx_cls, "unbindPip");
     fn_wrapper_1a<Context, decltype(&Context::checkPipAvail), &Context::checkPipAvail, pass_through<bool>,
                   conv_from_str<PipId>>::def_wrap(ctx_cls, "checkPipAvail");
-    fn_wrapper_1a<Context, decltype(&Context::getBoundPipNet), &Context::getBoundPipNet, conv_to_str<IdString>,
+    fn_wrapper_1a<Context, decltype(&Context::getBoundPipNet), &Context::getBoundPipNet, deref_and_wrap<NetInfo>,
                   conv_from_str<PipId>>::def_wrap(ctx_cls, "getBoundPipNet");
     fn_wrapper_1a<Context, decltype(&Context::getConflictingPipNet), &Context::getConflictingPipNet,
-                  conv_to_str<IdString>, conv_from_str<PipId>>::def_wrap(ctx_cls, "getConflictingPipNet");
+                  deref_and_wrap<NetInfo>, conv_from_str<PipId>>::def_wrap(ctx_cls, "getConflictingPipNet");
 
     fn_wrapper_1a<Context, decltype(&Context::getPipsDownhill), &Context::getPipsDownhill, wrap_context<PipRange>,
                   conv_from_str<WireId>>::def_wrap(ctx_cls, "getPipsDownhill");
diff --git a/ecp5/bitstream.cc b/ecp5/bitstream.cc
index f12e09b2..a1edf9e5 100644
--- a/ecp5/bitstream.cc
+++ b/ecp5/bitstream.cc
@@ -163,7 +163,7 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex
 
     // Add all set, configurable pips to the config
     for (auto pip : ctx->getPips()) {
-        if (ctx->getBoundPipNet(pip) != IdString()) {
+        if (ctx->getBoundPipNet(pip) != nullptr) {
             if (ctx->getPipClass(pip) == 0) { // ignore fixed pips
                 std::string tile = ctx->getPipTilename(pip);
                 std::string source = get_trellis_wirename(ctx, pip.location, ctx->getPipSrcWire(pip));
@@ -244,9 +244,9 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex
             cc.tiles[tname].add_enum(slice + ".REG1.REGSET",
                                      str_or_default(ci->params, ctx->id("REG1_REGSET"), "RESET"));
             cc.tiles[tname].add_enum(slice + ".CEMUX", str_or_default(ci->params, ctx->id("CEMUX"), "1"));
-            IdString lsrnet;
+            NetInfo *lsrnet = nullptr;
             if (ci->ports.find(ctx->id("LSR")) != ci->ports.end() && ci->ports.at(ctx->id("LSR")).net != nullptr)
-                lsrnet = ci->ports.at(ctx->id("LSR")).net->name;
+                lsrnet = ci->ports.at(ctx->id("LSR")).net;
             if (ctx->getBoundWireNet(ctx->getWireByName(
                         ctx->id(fmt_str("X" << bel.location.x << "/Y" << bel.location.y << "/LSR0")))) == lsrnet) {
                 cc.tiles[tname].add_enum("LSR0.SRMODE", str_or_default(ci->params, ctx->id("SRMODE"), "LSR_OVER_CE"));