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| author | David Shah <dave@ds0.me> | 2020-10-15 09:36:15 +0100 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2020-10-15 09:36:15 +0100 |
| commit | b18ea204c2cd88a5fad8989f4597cfa3a8152ca1 (patch) | |
| tree | 83d380897bc119f7f4295a8f795e23a826e62735 /docs | |
| parent | 576baa994f4b9e1746a231469bfd9e65d1d5a2b4 (diff) | |
| download | nextpnr-b18ea204c2cd88a5fad8989f4597cfa3a8152ca1.tar.gz nextpnr-b18ea204c2cd88a5fad8989f4597cfa3a8152ca1.tar.bz2 nextpnr-b18ea204c2cd88a5fad8989f4597cfa3a8152ca1.zip | |
Remove wire alias API
It has not actually been implemented in any router for over 2.5 years and causes nothing more than confusion. It can always be added back if it forms part of a future solution; possibly as part of a more general database structure rethink.
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/archapi.md | 11 | ||||
| -rw-r--r-- | docs/generic.md | 4 |
2 files changed, 1 insertions, 14 deletions
diff --git a/docs/archapi.md b/docs/archapi.md index 5e7562d3..3de6c132 100644 --- a/docs/archapi.md +++ b/docs/archapi.md @@ -335,15 +335,6 @@ Get all pips downhill of a wire, i.e. pips that use this wire as source wire. Get all pips uphill of a wire, i.e. pips that use this wire as destination wire. -### const\_range\<PipId\> getWireAliases(WireId wire) const - -Get all alias pips downhill of a wire. - -There is no api for getting the alias pips uphill of a wire. - -Alias pips come in antiparallel pairs if a signal can be injected on either -side of the alias pip. - Group Methods ------------- @@ -517,4 +508,4 @@ Name of the default router algorithm for the architecture, if ### static const std::vector\<std::string\> availableRouters Name of available router algorithms for the architecture, used -to provide help for and validate `--router`.
\ No newline at end of file +to provide help for and validate `--router`. diff --git a/docs/generic.md b/docs/generic.md index a635f98c..5ea4804d 100644 --- a/docs/generic.md +++ b/docs/generic.md @@ -28,10 +28,6 @@ Adds a pip (programmable connection between two named wires). Pip delays that co Loc is constructed using `Loc(x, y, z)`. 'z' for pips is only important if region constraints (e.g. for partial reconfiguration regions) are used. -### void addAlias(IdString name, IdString type, IdString srcWire, IdString dstWire, DelayInfo delay); - -Adds a wire alias (fixed connection between two named wires). Alias delays that correspond to delay estimates are important for router performance (as the router uses an A* type algorithm), even if timing is otherwise not of importance. - ### void addBel(IdString name, IdString type, Loc loc, bool gb); Adds a bel to the FPGA description. Bel type should match the type of cells in the netlist that are placed at this bel (see below for information on special bel types supported by the packer). Loc is constructed using `Loc(x, y, z)` and must be unique. |