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authorMaciej Kurc <mkurc@antmicro.com>2021-09-28 17:24:43 +0200
committerMaciej Kurc <mkurc@antmicro.com>2021-09-28 17:42:51 +0200
commita9df3b425fb8a2e6b9054a0abbf033942eabc602 (patch)
tree8e7e66806d582f66a3901199cfd8e0440f80bb44 /common/report.cc
parent6deff56e836543fe6d3083d7402fd42edc00e4c7 (diff)
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Added description of the JSON report structure.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
Diffstat (limited to 'common/report.cc')
-rw-r--r--common/report.cc74
1 files changed, 73 insertions, 1 deletions
diff --git a/common/report.cc b/common/report.cc
index a595777a..5330583e 100644
--- a/common/report.cc
+++ b/common/report.cc
@@ -101,7 +101,7 @@ static Json::array report_critical_paths (const Context* ctx) {
// Critical paths
for (auto &report : ctx->timing_result.clock_paths) {
-
+
critPathsJson.push_back(Json::object({
{"from", clock_event_name(ctx, report.second.clock_pair.start)},
{"to", clock_event_name(ctx, report.second.clock_pair.end)},
@@ -161,6 +161,78 @@ static Json::array report_detailed_net_timings (const Context* ctx) {
return detailedNetTimingsJson;
}
+/*
+Report JSON structure:
+
+{
+ "utilization": {
+ <BEL name>: {
+ "available": <available count>,
+ "used": <used count>
+ },
+ ...
+ },
+ "fmax" {
+ <clock name>: {
+ "achieved": <achieved fmax [MHz]>,
+ "constraint": <target fmax [MHz]>
+ },
+ ...
+ },
+ "critical_paths": [
+ {
+ "from": <clock event edge and name>,
+ "to": <clock event edge and name>,
+ "path": [
+ {
+ "from": {
+ "cell": <driver cell name>
+ "port": <driver port name>
+ "loc": [
+ <grid x>,
+ <grid y>
+ ]
+ },
+ "to": {
+ "cell": <sink cell name>
+ "port": <sink port name>
+ "loc": [
+ <grid x>,
+ <grid y>
+ ]
+ },
+ "type": <path segment type "logic" or "routing">,
+ "net": <net name (for routing only!)>,
+ "delay": <segment delay [ns]>,
+ "budget": <segment delay budget [ns] (for routing only!)>,
+ }
+ ...
+ ]
+ },
+ ...
+ ],
+ "detailed_net_timings": [
+ {
+ "driver": <driving cell name>,
+ "port": <driving cell port name>,
+ "event": <driver clock event name>,
+ "net": <net name>,
+ "endpoints": [
+ {
+ "cell": <sink cell name>,
+ "port": <sink cell port name>,
+ "event": <destination clock event name>,
+ "delay": <delay [ns]>,
+ "budget": <delay budget [ns]>,
+ }
+ ...
+ ]
+ }
+ ...
+ ]
+}
+*/
+
void Context::writeReport(std::ostream &out) const
{
auto util = get_utilization(this);