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| author | YRabbit <rabbit@yrabbit.cyou> | 2022-12-04 15:06:44 +1000 |
|---|---|---|
| committer | YRabbit <rabbit@yrabbit.cyou> | 2022-12-04 15:06:44 +1000 |
| commit | 2e68962a025999ec85276f6362540c13ccfcd752 (patch) | |
| tree | e1c0d9538a33bce405a5d14ca67baa6ccd1297b9 /bba | |
| parent | f07d9a18356ec8df74d9c42693f7b9307e390a7f (diff) | |
| download | nextpnr-2e68962a025999ec85276f6362540c13ccfcd752.tar.gz nextpnr-2e68962a025999ec85276f6362540c13ccfcd752.tar.bz2 nextpnr-2e68962a025999ec85276f6362540c13ccfcd752.zip | |
gowin: add PLL pins processing
Uses the information of the special input pins for the PLL in the
current chip. If such pins are involved, no routing is performed and
information about the use of implicit wires is passed to the packer.
The RESET and RESET_P inputs are now also disabled if they are connected
to VSS/VCC.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
Diffstat (limited to 'bba')
0 files changed, 0 insertions, 0 deletions