Use DelayInfo for cell timing instead of delay_t

Signed-off-by: David Shah <davey1576@gmail.com>

7 files changed, 16 insertions, 16 deletions

diff --git a/common/timing.cc b/common/timing.cc
index d91dea20..4486fc24 100644
--- a/common/timing.cc
+++ b/common/timing.cc
@@ -41,13 +41,13 @@ static delay_t follow_user_port(Context *ctx, PortRef &user, int path_length, de
         // Follow outputs of the user
         for (auto port : user.cell->ports) {
             if (port.second.type == PORT_OUT) {
-                delay_t comb_delay;
+                DelayInfo comb_delay;
                 // Look up delay through this path
                 bool is_path = ctx->getCellDelay(user.cell, user.port, port.first, comb_delay);
                 if (is_path) {
                     NetInfo *net = port.second.net;
                     if (net) {
-                        delay_t path_budget = follow_net(ctx, net, path_length, slack - comb_delay);
+                        delay_t path_budget = follow_net(ctx, net, path_length, slack - comb_delay.maxDelay());
                         value = std::min(value, path_budget);
                     }
                 }
@@ -88,9 +88,9 @@ void assign_budget(Context *ctx)
                 IdString clock_domain = ctx->getPortClock(cell.second.get(), port.first);
                 if (clock_domain != IdString()) {
                     delay_t slack = delay_t(1.0e12 / ctx->target_freq); // TODO: clock constraints
-                    delay_t clkToQ;
+                    DelayInfo clkToQ;
                     if (ctx->getCellDelay(cell.second.get(), clock_domain, port.first, clkToQ))
-                        slack -= clkToQ;
+                        slack -= clkToQ.maxDelay();
                     if (port.second.net)
                         follow_net(ctx, port.second.net, 0, slack);
                 }
diff --git a/ecp5/arch.cc b/ecp5/arch.cc
index 55fe5704..c8617190 100644
--- a/ecp5/arch.cc
+++ b/ecp5/arch.cc
@@ -440,7 +440,7 @@ DecalXY Arch::getGroupDecal(GroupId pip) const { return {}; };
 
 // -----------------------------------------------------------------------
 
-bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, delay_t &delay) const
+bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const
 {
     return false;
 }
diff --git a/ecp5/arch.h b/ecp5/arch.h
index b6aac9cf..7d183e11 100644
--- a/ecp5/arch.h
+++ b/ecp5/arch.h
@@ -801,7 +801,7 @@ struct Arch : BaseCtx
 
     // Get the delay through a cell from one port to another, returning false
     // if no path exists
-    bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, delay_t &delay) const;
+    bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const;
     // Get the associated clock to a port, or empty if the port is combinational
     IdString getPortClock(const CellInfo *cell, IdString port) const;
     // Return true if a port is a clock
diff --git a/generic/arch.cc b/generic/arch.cc
index 5c9864ab..892bb0fd 100644
--- a/generic/arch.cc
+++ b/generic/arch.cc
@@ -425,7 +425,7 @@ DecalXY Arch::getGroupDecal(GroupId group) const { return groups.at(group).decal
 
 // ---------------------------------------------------------------
 
-bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, delay_t &delay) const
+bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const
 {
     return false;
 }
diff --git a/generic/arch.h b/generic/arch.h
index 01a90ee1..ed069d4d 100644
--- a/generic/arch.h
+++ b/generic/arch.h
@@ -210,7 +210,7 @@ struct Arch : BaseCtx
     DecalXY getPipDecal(PipId pip) const;
     DecalXY getGroupDecal(GroupId group) const;
 
-    bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, delay_t &delay) const;
+    bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const;
     IdString getPortClock(const CellInfo *cell, IdString port) const;
     bool isClockPort(const CellInfo *cell, IdString port) const;
 
diff --git a/ice40/arch.cc b/ice40/arch.cc
index 93a49dde..8162098c 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -775,29 +775,29 @@ std::vector<GraphicElement> Arch::getDecalGraphics(DecalId decal) const
 
 // -----------------------------------------------------------------------
 
-bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, delay_t &delay) const
+bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const
 {
     if (cell->type == id_icestorm_lc) {
         if ((fromPort == id_i0 || fromPort == id_i1 || fromPort == id_i2 || fromPort == id_i3) &&
             (toPort == id_o || toPort == id_lo)) {
-            delay = 450;
+            delay.delay = 450;
             return true;
         } else if (fromPort == id_cin && toPort == id_cout) {
-            delay = 120;
+            delay.delay = 120;
             return true;
         } else if (fromPort == id_i1 && toPort == id_cout) {
-            delay = 260;
+            delay.delay = 260;
             return true;
         } else if (fromPort == id_i2 && toPort == id_cout) {
-            delay = 230;
+            delay.delay = 230;
             return true;
         } else if (fromPort == id_clk && toPort == id_o) {
-            delay = 540;
+            delay.delay = 540;
             return true;
         }
     } else if (cell->type == id_icestorm_ram) {
         if (fromPort == id_rclk) {
-            delay = 2140;
+            delay.delay = 2140;
             return true;
         }
     }
diff --git a/ice40/arch.h b/ice40/arch.h
index 0243e978..8c6a3d93 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -722,7 +722,7 @@ struct Arch : BaseCtx
 
     // Get the delay through a cell from one port to another, returning false
     // if no path exists
-    bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, delay_t &delay) const;
+    bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const;
     // Get the associated clock to a port, or empty if the port is combinational
     IdString getPortClock(const CellInfo *cell, IdString port) const;
     // Return true if a port is a clock