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| author | David Shah <dave@ds0.me> | 2018-12-06 10:52:46 +0000 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2018-12-06 10:52:46 +0000 |
| commit | 88e1e6bdf4d01d31389fce92cdc88e16c9a5ebc1 (patch) | |
| tree | e8f0a84fceeb2176c8bdef167d036a1738de4a0b | |
| parent | 2fef79c2764d05a19ed2334c17968e72492c870e (diff) | |
| download | nextpnr-88e1e6bdf4d01d31389fce92cdc88e16c9a5ebc1.tar.gz nextpnr-88e1e6bdf4d01d31389fce92cdc88e16c9a5ebc1.tar.bz2 nextpnr-88e1e6bdf4d01d31389fce92cdc88e16c9a5ebc1.zip | |
clangformat
Signed-off-by: David Shah <dave@ds0.me>
| -rw-r--r-- | ice40/bitstream.cc | 2 | ||||
| -rw-r--r-- | ice40/cells.cc | 3 |
2 files changed, 3 insertions, 2 deletions
diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index 87d77b9d..83664169 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -592,7 +592,7 @@ void write_asc(const Context *ctx, std::ostream &out) configure_extra_cell(config, ctx, cell.second.get(), rgba_params, true, std::string("IpConfig.")); set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "RGBA_DRV_EN", true, "IpConfig."); } else if (cell.second->type == ctx->id("SB_WARMBOOT") || cell.second->type == ctx->id("ICESTORM_LFOSC") || - cell.second->type == ctx->id("SB_LEDDA_IP") ) { + cell.second->type == ctx->id("SB_LEDDA_IP")) { // No config needed } else if (cell.second->type == ctx->id("ICESTORM_SPRAM")) { const BelInfoPOD &beli = ci.bel_data[bel.index]; diff --git a/ice40/cells.cc b/ice40/cells.cc index aad719b1..35a5346f 100644 --- a/ice40/cells.cc +++ b/ice40/cells.cc @@ -269,7 +269,8 @@ std::unique_ptr<CellInfo> create_ice_cell(Context *ctx, IdString type, std::stri add_port(ctx, new_cell.get(), "LEDDADDR" + std::to_string(i), PORT_IN); add_port(ctx, new_cell.get(), "LEDDDEN", PORT_IN); add_port(ctx, new_cell.get(), "LEDDEXE", PORT_IN); - add_port(ctx, new_cell.get(), "LEDDRST", PORT_IN); //doesn't actually exist, for icecube code compatibility only + add_port(ctx, new_cell.get(), "LEDDRST", PORT_IN); // doesn't actually exist, for icecube code compatibility + // only add_port(ctx, new_cell.get(), "PWMOUT0", PORT_OUT); add_port(ctx, new_cell.get(), "PWMOUT1", PORT_OUT); add_port(ctx, new_cell.get(), "PWMOUT2", PORT_OUT); |