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authorgatecat <gatecat@ds0.me>2021-02-23 22:55:09 +0000
committerGitHub <noreply@github.com>2021-02-23 22:55:09 +0000
commit19ae97afd12e3fed9d09aaf886f6e25a92de1032 (patch)
tree68b899b428e601e58c531585aec5de3f4cb63f7c
parent5de19786322412ce151b0341ed714dcdb03433cc (diff)
parent0758f68020efa6d9441eab9de903673f02d47639 (diff)
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Merge pull request #595 from litghost/const_cell_info
Change CellInfo in getBelPinsForCellPin to be const.
-rw-r--r--common/nextpnr.h4
-rw-r--r--docs/archapi.md2
-rw-r--r--fpga_interchange/arch.h2
-rw-r--r--generic/arch.cc2
-rw-r--r--generic/arch.h2
-rw-r--r--gowin/arch.cc2
-rw-r--r--gowin/arch.h2
7 files changed, 8 insertions, 8 deletions
diff --git a/common/nextpnr.h b/common/nextpnr.h
index ed227fb6..59198d6d 100644
--- a/common/nextpnr.h
+++ b/common/nextpnr.h
@@ -1146,7 +1146,7 @@ template <typename R> struct ArchAPI : BaseCtx
virtual WireId getBelPinWire(BelId bel, IdString pin) const = 0;
virtual PortType getBelPinType(BelId bel, IdString pin) const = 0;
virtual typename R::BelPinsRangeT getBelPins(BelId bel) const = 0;
- virtual typename R::CellBelPinRangeT getBelPinsForCellPin(CellInfo *cell_info, IdString pin) const = 0;
+ virtual typename R::CellBelPinRangeT getBelPinsForCellPin(const CellInfo *cell_info, IdString pin) const = 0;
// Wire methods
virtual typename R::AllWiresRangeT getWires() const = 0;
virtual WireId getWireByName(IdStringList name) const = 0;
@@ -1298,7 +1298,7 @@ template <typename R> struct BaseArch : ArchAPI<R>
return empty_if_possible<typename R::BelAttrsRangeT>();
}
- virtual typename R::CellBelPinRangeT getBelPinsForCellPin(CellInfo *cell_info, IdString pin) const override
+ virtual typename R::CellBelPinRangeT getBelPinsForCellPin(const CellInfo *cell_info, IdString pin) const override
{
return return_if_match<std::array<IdString, 1>, typename R::CellBelPinRangeT>({pin});
}
diff --git a/docs/archapi.md b/docs/archapi.md
index 9ecb1bf1..55f5c3bc 100644
--- a/docs/archapi.md
+++ b/docs/archapi.md
@@ -236,7 +236,7 @@ Return the type (input/output/inout) of the given bel pin.
Return a list of all pins on that bel.
-### CellBelPinRangeT getBelPinsForCellPin(CellInfo *cell_info, IdString pin) const
+### CellBelPinRangeT getBelPinsForCellPin(const CellInfo *cell_info, IdString pin) const
Return the list of bel pin names that a given cell pin should be routed to. In most cases there will be a single bel pin for each cell pin; and output pins must _always_ have only one bel pin associated with them.
diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h
index 82a2788b..1118a96b 100644
--- a/fpga_interchange/arch.h
+++ b/fpga_interchange/arch.h
@@ -1033,7 +1033,7 @@ struct Arch : ArchAPI<ArchRanges>
return str_range;
}
- const std::vector<IdString> &getBelPinsForCellPin(CellInfo *cell_info, IdString pin) const override
+ const std::vector<IdString> &getBelPinsForCellPin(const CellInfo *cell_info, IdString pin) const override
{
return cell_info->cell_bel_pins.at(pin);
}
diff --git a/generic/arch.cc b/generic/arch.cc
index 03d8c801..1f9531c7 100644
--- a/generic/arch.cc
+++ b/generic/arch.cc
@@ -347,7 +347,7 @@ std::vector<IdString> Arch::getBelPins(BelId bel) const
return ret;
}
-const std::vector<IdString> &Arch::getBelPinsForCellPin(CellInfo *cell_info, IdString pin) const
+const std::vector<IdString> &Arch::getBelPinsForCellPin(const CellInfo *cell_info, IdString pin) const
{
return cell_info->bel_pins.at(pin);
}
diff --git a/generic/arch.h b/generic/arch.h
index 8a5b27e0..cc8de484 100644
--- a/generic/arch.h
+++ b/generic/arch.h
@@ -247,7 +247,7 @@ struct Arch : ArchAPI<ArchRanges>
WireId getBelPinWire(BelId bel, IdString pin) const override;
PortType getBelPinType(BelId bel, IdString pin) const override;
std::vector<IdString> getBelPins(BelId bel) const override;
- const std::vector<IdString> &getBelPinsForCellPin(CellInfo *cell_info, IdString pin) const override;
+ const std::vector<IdString> &getBelPinsForCellPin(const CellInfo *cell_info, IdString pin) const override;
WireId getWireByName(IdStringList name) const override;
IdStringList getWireName(WireId wire) const override;
diff --git a/gowin/arch.cc b/gowin/arch.cc
index d1fbd0ed..7e947341 100644
--- a/gowin/arch.cc
+++ b/gowin/arch.cc
@@ -824,7 +824,7 @@ std::vector<IdString> Arch::getBelPins(BelId bel) const
return ret;
}
-std::array<IdString, 1> Arch::getBelPinsForCellPin(CellInfo *cell_info, IdString pin) const { return {pin}; }
+std::array<IdString, 1> Arch::getBelPinsForCellPin(const CellInfo *cell_info, IdString pin) const { return {pin}; }
// ---------------------------------------------------------------
diff --git a/gowin/arch.h b/gowin/arch.h
index 0b0d7b9c..052c1545 100644
--- a/gowin/arch.h
+++ b/gowin/arch.h
@@ -372,7 +372,7 @@ struct Arch : BaseArch<ArchRanges>
WireId getBelPinWire(BelId bel, IdString pin) const override;
PortType getBelPinType(BelId bel, IdString pin) const override;
std::vector<IdString> getBelPins(BelId bel) const override;
- std::array<IdString, 1> getBelPinsForCellPin(CellInfo *cell_info, IdString pin) const override;
+ std::array<IdString, 1> getBelPinsForCellPin(const CellInfo *cell_info, IdString pin) const override;
WireId getWireByName(IdStringList name) const override;
IdStringList getWireName(WireId wire) const override;