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| author | Maciej Dudek <mdudek@antmicro.com> | 2022-03-09 14:13:29 +0100 |
|---|---|---|
| committer | Maciej Dudek <mdudek@antmicro.com> | 2022-03-09 14:13:29 +0100 |
| commit | 191be632e23b26fa9eae484b04dde0ad5af35e39 (patch) | |
| tree | 397f9a7051e353eb7b0fd6d9c4fcf28794bd6160 | |
| parent | 81e970867d655735920e4133ad130fe2a05172e7 (diff) | |
| download | nextpnr-191be632e23b26fa9eae484b04dde0ad5af35e39.tar.gz nextpnr-191be632e23b26fa9eae484b04dde0ad5af35e39.tar.bz2 nextpnr-191be632e23b26fa9eae484b04dde0ad5af35e39.zip | |
nexus: DCCs cannot be cascaded
This commit solves implicit cascading when clock signal drives DCC and logic
Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
| -rw-r--r-- | nexus/pack.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/nexus/pack.cc b/nexus/pack.cc index a769c05a..bff50d89 100644 --- a/nexus/pack.cc +++ b/nexus/pack.cc @@ -883,7 +883,7 @@ struct NexusPacker for (size_t i = 0; i < std::min<size_t>(clk_fanout.size(), available_globals); i++) { NetInfo *net = ctx->nets.at(clk_fanout.at(i).second).get(); log_info(" promoting clock net '%s'\n", ctx->nameOf(net)); - insert_buffer(net, id_DCC, "glb_clk", id_CLKI, id_CLKO, [](const PortRef &port) { return true; }); + insert_buffer(net, id_DCC, "glb_clk", id_CLKI, id_CLKO, [&](const PortRef &port) { return port.cell->type != id_DCC; }); } } |