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Diffstat (limited to 'ice40/regressions/issue0183/TopEntity.json')
| -rw-r--r-- | ice40/regressions/issue0183/TopEntity.json | 140987 |
1 files changed, 0 insertions, 140987 deletions
diff --git a/ice40/regressions/issue0183/TopEntity.json b/ice40/regressions/issue0183/TopEntity.json deleted file mode 100644 index a778e6a..0000000 --- a/ice40/regressions/issue0183/TopEntity.json +++ /dev/null @@ -1,140987 +0,0 @@ -{ - "creator": "Yosys 0.8+2 (git sha1 debc0d35, gcc 8.2.0-9 -fPIC -Os)", - "modules": { - "ICESTORM_LC": { - "attributes": { - "blackbox": 1, - "src": "/home/uni-user/tools/yosys/share/ice40/cells_sim.v:648" - }, - "ports": { - "I0": { - "direction": "input", - "bits": [ 2 ] - }, - "I1": { - "direction": "input", - "bits": [ 3 ] - }, - "I2": { - "direction": "input", - "bits": [ 4 ] - }, - "I3": { - "direction": "input", - "bits": [ 5 ] - }, - "CIN": { - "direction": "input", - "bits": [ 6 ] - }, - "CLK": { - "direction": "input", - "bits": [ 7 ] - }, - "CEN": { - "direction": "input", - "bits": [ 8 ] - }, - "SR": { - "direction": "input", - "bits": [ 9 ] - }, - "LO": { - "direction": "output", - "bits": [ 10 ] - }, - "O": { - "direction": "output", - "bits": [ 11 ] - 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"hide_name": 0, - "bits": [ 5684, 5685, 5686, 5687, 5688, 5689, 5690, 5691, 5699, 740, 741, 742, 743, 736, 737, 738, 739 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:19" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.ds1_0": { - "hide_name": 0, - "bits": [ 204, 259, 257, 253, 249, 245, 241, 237, 233, 229, 225, 221, 202, 889, 746, 890, 740, 741, 742, 743, 736, 737, 738, 739 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:28" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.ds1_1": { - "hide_name": 0, - "bits": [ 212, 213, 214, 215, 243, 239, 235, 231, 227, 223, 219, 200, 209, 208, 207, 259, 257, 253, 249, 245, 241, 237, 233, 229, 225, 221, 202, 889, 746, 890, 740, 741, 742, 743, 736, 737, 738, 739 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:64" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.ds2": { - "hide_name": 0, - "bits": [ 740, 741, 742, 743, 736, 737, 738, 739 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:26" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.ds3": { - "hide_name": 0, - "bits": [ 259, 257, 253, 249, 245, 241, 237, 233, 229, 225, 221, 202, 889, 746, 890 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:23" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.ds4": { - "hide_name": 0, - "bits": [ 204 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:27" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.ds6": { - "hide_name": 0, - "bits": [ 212, 213, 214, 215, 243, 239, 235, 231, 227, 223, 219, 200 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:41" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.ds6_0": { - "hide_name": 0, - "bits": [ 212, 213, 214, 215, 243, 239, 235, 231, 227, 223, 219, 200 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:42" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.i": { - "hide_name": 0, - "bits": [ 212, 213, 214, 215 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:36" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.i_0": { - "hide_name": 0, - "bits": [ 212, 213, 214, 215 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:38" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.n": { - "hide_name": 0, - "bits": [ 259, 257, 253, 249, 245, 241, 237, 233, 229, 225, 221, 202, 889, 746, 890 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:62" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.o": { - "hide_name": 0, - "bits": [ 212, 213, 214, 215, 243, 239, 235, 231, 227, 223, 219, 200, 209, 208, 207 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:63" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.readControl": { - "hide_name": 0, - "bits": [ 4769, 4770, 4771, 4772, 4773, 4774, 4775, "0", 1900 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:8" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.result": { - "hide_name": 0, - "bits": [ 5684, 5685, 5686, 5687, 5688, 5689, 5690, 5691, 5692, 204, 5700, 5701 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:11" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.result_0": { - "hide_name": 0, - "bits": [ 740, 741, 742, 743, 736, 737, 738, 739 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:21" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.result_2": { - "hide_name": 0, - "bits": [ 4769, 4770, 4771, 4772, 4773, 4774, 4775, "x", 1901 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:58" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.sdo": { - "hide_name": 0, - "bits": [ 5 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:7" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.spc": { - "hide_name": 0, - "bits": [ 204 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:16" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.state": { - "hide_name": 0, - "bits": [ 212, 213, 214, 215, 243, 239, 235, 231, 227, 223, 219, 200, 209, 208, 207 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:55" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.x": { - "hide_name": 0, - "bits": [ 5701 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:17", - "unused_bits": "0" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.x_0": { - "hide_name": 0, - "bits": [ 5700 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:18", - "unused_bits": "0" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.x_1": { - "hide_name": 0, - "bits": [ 5684, 5685, 5686, 5687, 5688, 5689, 5690, 5691, 5699 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:24", - "unused_bits": "0 1 2 3 4 5 6 7 8" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_readSPI_ds1.x_2": { - "hide_name": 0, - "bits": [ 259, 257, 253, 249, 245, 241, 237, 233, 229, 225, 221, 202, 889, 746, 890 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:96|verilog/TopEntity/TopEntity/SensorSpi_readSPI.v:44" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_writeSPI_ds_0.#$j_app_arg": { - "hide_name": 0, - "bits": [ 813 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:102|verilog/TopEntity/TopEntity/SensorSpi_writeSPI.v:48" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_writeSPI_ds_0.#controlBuffer_case_alt": { - "hide_name": 0, - "bits": [ "0", "0", 4776, 4777, 4778, 4779, 4780, 4781, 4782, 4783, 4784, 4785, 4786, 4787, 4788, "x", 5709 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:102|verilog/TopEntity/TopEntity/SensorSpi_writeSPI.v:64" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_writeSPI_ds_0.#spc_case_alt": { - "hide_name": 0, - "bits": [ 1030 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:102|verilog/TopEntity/TopEntity/SensorSpi_writeSPI.v:19" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_writeSPI_ds_0.#state_case_alt": { - "hide_name": 0, - "bits": [ 197, 193, 188, 180, 176, 173, 170, 164, 958, 965, 971, 839, 977, 980, 987, 995, 1000, 1007, 1012, 3514, 3504, 818, 888 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:102|verilog/TopEntity/TopEntity/SensorSpi_writeSPI.v:59" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_writeSPI_ds_0.#tup_app_arg": { - "hide_name": 0, - "bits": [ 813 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:102|verilog/TopEntity/TopEntity/SensorSpi_writeSPI.v:42" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_writeSPI_ds_0.#tup_app_arg_0": { - "hide_name": 0, - "bits": [ 813 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:102|verilog/TopEntity/TopEntity/SensorSpi_writeSPI.v:55" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_writeSPI_ds_0.#tup_app_arg_1": { - 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} - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_writeSPI_ds_0.#tup_case_alt_0": { - "hide_name": 0, - "bits": [ "0", "0", 5714, 5715, 5716, 5717, 5718, 174, 171, 168, 161, 803, 804, 805, 802, 806, 807, 810, 808, 811, 812, 809, 813, 5719, 5720, 5721 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:102|verilog/TopEntity/TopEntity/SensorSpi_writeSPI.v:29" - } - }, - "main.Converter_inputManager_ds.SensorSpi_sensor_ds.SensorSpi_spi_ds.SensorSpi_writeSPI_ds_0.#tup_case_alt_1": { - "hide_name": 0, - "bits": [ "0", 5722, 5723, 194, 195, 189, 178, 174, 171, 168, 161, 5724, 5725, 5726, 5727, 5728, 5729, 5730, 5731, 5732, 5733, 5734, 5735, 5736, 5737, 5738 ], - "attributes": { - "src": "verilog/TopEntity/TopEntity/SuperTopEntity.v:38|verilog/TopEntity/TopEntity/TopEntity.v:125|verilog/TopEntity/TopEntity/Converter_inputManager.v:60|verilog/TopEntity/TopEntity/SensorSpi_sensor.v:553|verilog/TopEntity/TopEntity/SensorSpi_spi.v:102|verilog/TopEntity/TopEntity/SensorSpi_writeSPI.v:31" - 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