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| author | gatecat <gatecat@ds0.me> | 2021-02-12 09:56:37 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-02-12 09:56:37 +0000 |
| commit | 31648368460b9e216479ce7c38e6fed883c380c4 (patch) | |
| tree | 0f9917ff76215c44dc2f1af5ca749f0e73d24f60 /generic/flow/bel-pin/post_route.py | |
| parent | 8f93e7e0f897b1b5da469919c9a43ba28b623b2a (diff) | |
| parent | f9c773f18546cbaa963aeaa3f143cb8067b6e2f9 (diff) | |
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Merge pull request #3 from litghost/fpga_interchange_xdc_test
Add simple unit test for FPGA interchange XDC parser.
Diffstat (limited to 'generic/flow/bel-pin/post_route.py')
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