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* icebox_hlc2asc: Adding more descriptive errors messagesElms2018-06-201-24/+27
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* icebox_hlc2asc: Set LUT bits to zero by default.Tim 'mithro' Ansell2018-06-151-2/+2
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* Merge pull request #160 from mithro/hlc-sortClifford Wolf2018-06-151-0/+41
|\ | | | | icebox_hlcsort: Adding a tool for canonicalizing HLC files.
| * icebox_hlcsort: Adding a tool for canonicalizing HLC files.Tim 'mithro' Ansell2018-06-141-0/+41
| | | | | | | | | | This is done by sorting all the commands inside a block. Doing so makes it much easier to diff two files.
* | icebox: Fix issue introduced by f7e9fec63a3f88bee8c27e858da319ea03d68d14Tim 'mithro' Ansell2018-06-141-2/+2
|/ | | | | | | | Current code fails with the following; ``` Parse error in line 94: span4_y3_g15_6 -> local_g0_3 -> D_OUT_0 ```
* Merge pull request #151 from mithro/hlc-lut-initClifford Wolf2018-06-131-2/+13
|\ | | | | icebox_hlc2asc: Allow truth tables to be specified as init string.
| * icebox_hlc2asc: Allow truth tables to be specified as init string.Joel Holdsworth2018-06-111-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Examples; ```hlc lutff_5 { # - Parameters ------- # LUT_INIT = 0111111110000000 local_g3_4 -> lutff_5/in_0 local_g0_6 -> lutff_5/in_1 local_g2_7 -> lutff_5/in_2 lutff_5/out -> span4_x3_g12_11 lutff_5/out -> local_g3_5 -> lutff_5/in_3 out = 16'b0111111110000000 enable_dff } ``` ```hlc lutff_4 { local_g3_5 -> lutff_4/in_2 lutff_4/out -> span12_y12_g6_0 out = 16'b0000000000010000 enable_dff } ``` ```hlc lutff_2 { # - Parameters ------- # LUT_INIT = 01 lutff_2/out -> span12_y12_g8_0 lutff_2/out -> span12_x2_g14_0 lutff_2/out -> local_g0_2 -> lutff_2/in_0 out = 2'b01 enable_dff } ```
* | Merge pull request #158 from mithro/remove-bidir-hlcClifford Wolf2018-06-132-15/+7
|\ \ | | | | | | Remove bidir stuff in HLC
| * | HLC: Use '~>' instead of '<->' for routing switches.Tim 'mithro' Ansell2018-06-122-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | As mentioned in ca6b2d9ebd521ecec58b9b5627c9380355adeab1, the 'routing' switches are not actually bidirectional. This makes the '<->' specifier very misleading. Instead use '~>' to differentiate it from the 'buffer' switches.
| * | icebox_hlc2asc: Remove the bidirectional support.Tim 'mithro' Ansell2018-06-121-8/+0
| |/ | | | | | | See ca6b2d9ebd521ecec58b9b5627c9380355adeab1.
* | Merge pull request #156 from mithro/hlc-devicesClifford Wolf2018-06-131-1/+3
|\ \ | | | | | | icebox_hlc2asc: Accept device types such as HX1K
| * | icebox_hlc2asc: Accept device types such as HX1KJoel Holdsworth2018-06-111-1/+3
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* | Merge pull request #153 from mithro/lout-driverClifford Wolf2018-06-131-0/+1
|\ \ | | | | | | icebox: Fix driver detection for LUT cascade.
| * | icebox: Fix driver detection for LUT cascade.Tim 'mithro' Ansell2018-06-111-0/+1
| |/ | | | | | | The lutff_X/lout is a driver signal.
* / icebox: Fix LUT output code.Tim 'mithro' Ansell2018-06-111-5/+5
|/ | | | sig values where "1'b0" and "1'b1" not "0" or "1".
* Fix icebox_html -8 modeClifford Wolf2018-06-101-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix routing description in icebox_html outputClifford Wolf2018-06-101-2/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Improve error message.Tim 'mithro' Ansell2018-06-041-3/+10
| | | | | | | | | | | | | | | | | | | | | Now; ----------------- Parse error in line 364: span4_y9_g7_10 <-> span4_x3_g13_5 conflicting bits ['!B12[8]', '!B12[9]', 'B12[10]'] setting:{(12, 10)} - current clear:{(12, 10), (12, 8)} clearing:{(12, 9), (12, 8)} - current set :{(12, 9)} ----------------- Previously; ----------------- File "icebox_hlc2asc.py", line 742, in apply_directive self.set_bits(bits) File "icebox_hlc2asc.py", line 762, in set_bits raise ParseError("conflicting bits") TypeError: __init__() takes 1 positional argument but 2 were given -----------------
* Merge pull request #147 from mithro/hlc-fixesClifford Wolf2018-06-011-4/+37
|\ | | | | Allow routing (bidir) entries to be looked up in either direction.
| * Allow routing (bidir) entries to be looked up in either direction.Tim 'mithro' Ansell2018-06-011-4/+37
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* | Merge pull request #146 from mithro/hlc-fixesClifford Wolf2018-05-311-5/+34
|\| | | | | Support both `abc/123` and `123` forms of specifying tracks.
| * Better error message when bit pattern is missing.Tim 'mithro' Ansell2018-05-301-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously; ``` self.apply_directive('buffer', src, dst) File "/usr/local/google/home/tansell/work/catx/vtr/env/conda/bin/icebox_hlc2asc", line 698, in apply_directive bits, = [entry[0] for entry in self.db if entry[1:] == fields] ValueError: not enough values to unpack (expected 1, got 0) ``` Now: ``` Parse error in line 2108: span12_y4_g14_0 -> span4_y4_g11_7 <-> span4_x7_g4_0 No bit pattern for ['buffer', 'sp12_h_r_11', 'sp4_h_r_7'] in LogicTile(1k, 7, 4) ```
| * Allow prefixes in multiple chained statements.Tim 'mithro' Ansell2018-05-301-2/+9
| | | | | | | | | | | | | | | | | | | | | | IE ``` lutff_1 { lutff_1/out -> local_g2_1 -> lutff_1/in_0 local_g2_2 -> lutff_1/in_3 local_g2_7 -> lutff_1/in_2 } ```
| * Support both `abc/123` and `123` forms of specifying tracks.Tim 'mithro' Ansell2018-05-301-0/+14
| | | | | | | | Kind of fixes #145.
* | icebox: Allow selecting package in icebox_vlogDavid Shah2018-05-302-8/+18
|/ | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Merge pull request #139 from awygle/lm_iceboxClifford Wolf2018-05-134-14/+284
|\ | | | | Icebox support for ice40 LM
| * Add chipdb-lm4k.txt to .gitignoreAndrew Wygle2018-05-131-0/+1
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| * Correct internal global buffers for lm4kAndrew Wygle2018-05-131-2/+2
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| * Added missing ieren entries for lm4k.Andrew Wygle2018-05-131-24/+28
| | | | | | | | Config SPI pins weren't present in ioctrl_lm4k.sh
| * Add lm4k chipdb to icebox Makefile.Andrew Wygle2018-05-131-2/+8
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| * Support lm4k in icebox_chipdb.py.Andrew Wygle2018-05-132-2/+10
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| * Completed first pass at icebox support for lm4k.Andrew Wygle2018-05-121-11/+14
| | | | | | | | Needs testing.
| * [WIP] Added colbuf and gbufin data for LM seriesAndrew Wygle2018-05-121-8/+25
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| * [WIP] Add partial icebox support for lm4k.Andrew Wygle2018-05-121-11/+242
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* | Extact reproducable chipdb-5k.txtClifford Wolf2018-05-131-2/+2
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add BG121 package variant and update docsDavid Shah2018-04-021-0/+190
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* Add UltraPlus I³C IO to chipdbDavid Shah2018-02-091-1/+10
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* Add RGB driver outputs to chipdbDavid Shah2018-02-091-0/+4
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* Add 5k UWG30 ieren data to dbDavid Shah2018-01-161-1/+5
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* Remove seperate 5k RAM DB and share with 8k insteadDavid Shah2018-01-162-2849/+9
| | | | | This should ensure that the 5k RAM routing entries are now complete, fixing #115
* Add pinout for 5k UWG30 packageDavid Shah2018-01-161-0/+23
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* HFOSC trimming infoDavid Shah2018-01-161-1/+12
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* New UltraPlus corner tracing algorithmDavid Shah2018-01-161-87/+86
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* Misc routing tweaksDavid Shah2018-01-161-3/+7
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* Figure out missing SPI config bits, and add to chipdbDavid Shah2018-01-161-0/+8
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* Chipdb fix for hard IPDavid Shah2017-11-261-4/+4
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* Add UltraPlus IP to chipdbDavid Shah2017-11-242-3/+212
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* Begin I2C/SPI IP reverse engineeringDavid Shah2017-11-231-0/+8
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* Fix whitespace and a couple of typosDavid Shah2017-11-201-3/+3
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* Add all cf_bits and pullup strength notesDavid Shah2017-11-181-0/+12
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