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authorDavid Shah <davey1576@gmail.com>2017-10-23 17:48:22 +0100
committerDavid Shah <davey1576@gmail.com>2017-10-23 17:48:22 +0100
commit81e0d3c361e1b639064e07ff7efd1b8232090e0c (patch)
tree6041ea53d896750a68bbbb3747e00c61919fde4e /icefuzz
parentbf21b644984656fdea6ec2609b22a74f3296115b (diff)
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Add some verilog tests for analysing up5k features
Diffstat (limited to 'icefuzz')
-rw-r--r--icefuzz/tests/intosc.pcf3
-rw-r--r--icefuzz/tests/intosc.v14
-rw-r--r--icefuzz/tests/sb_io_od.pcf12
-rw-r--r--icefuzz/tests/sb_io_od.v62
-rw-r--r--icefuzz/tests/sb_mac16.v65
-rw-r--r--icefuzz/tests/sb_rgba_drv.pcf3
-rw-r--r--icefuzz/tests/sb_rgba_drv.v32
-rw-r--r--icefuzz/tests/sb_spram256ka.v25
8 files changed, 216 insertions, 0 deletions
diff --git a/icefuzz/tests/intosc.pcf b/icefuzz/tests/intosc.pcf
new file mode 100644
index 0000000..9e580de
--- /dev/null
+++ b/icefuzz/tests/intosc.pcf
@@ -0,0 +1,3 @@
+set_io clkhfpu 2
+set_io clkhfen 3
+set_io clkhf 4
diff --git a/icefuzz/tests/intosc.v b/icefuzz/tests/intosc.v
new file mode 100644
index 0000000..227cb55
--- /dev/null
+++ b/icefuzz/tests/intosc.v
@@ -0,0 +1,14 @@
+module top (
+ input clkhfpu,
+ input clkhfen,
+ output clkhf
+);
+SB_HFOSC #(
+
+ .CLKHF_DIV("0b10")
+) hfosc (
+ .CLKHFPU(clkhfpu),
+ .CLKHFEN(clkhfen),
+ .CLKHF(clkhf)
+);
+endmodule
diff --git a/icefuzz/tests/sb_io_od.pcf b/icefuzz/tests/sb_io_od.pcf
new file mode 100644
index 0000000..b613227
--- /dev/null
+++ b/icefuzz/tests/sb_io_od.pcf
@@ -0,0 +1,12 @@
+# set_io pin 1
+set_io pin 39
+
+# set_io pin
+# set_io latch_in
+# set_io clk_in
+# set_io clk_out
+# set_io oen
+# set_io dout_0
+# set_io dout_1
+# set_io din_0
+# set_io din_1
diff --git a/icefuzz/tests/sb_io_od.v b/icefuzz/tests/sb_io_od.v
new file mode 100644
index 0000000..7894741
--- /dev/null
+++ b/icefuzz/tests/sb_io_od.v
@@ -0,0 +1,62 @@
+//`define CONN_INTERNAL_BITS
+
+`define PINTYPE 6'b010001
+// `define IOSTANDARD "SB_LVCMOS"
+`define IOSTANDARD "SB_LVCMOS"
+
+// The following IO standards are just aliases for SB_LVCMOS
+// `define IOSTANDARD "SB_LVCMOS25_16"
+// `define IOSTANDARD "SB_LVCMOS25_12"
+// `define IOSTANDARD "SB_LVCMOS25_8"
+// `define IOSTANDARD "SB_LVCMOS25_4"
+// `define IOSTANDARD "SB_LVCMOS18_10"
+// `define IOSTANDARD "SB_LVCMOS18_8"
+// `define IOSTANDARD "SB_LVCMOS18_4"
+// `define IOSTANDARD "SB_LVCMOS18_2"
+// `define IOSTANDARD "SB_LVCMOS15_4"
+// `define IOSTANDARD "SB_LVCMOS15_2"
+// `define IOSTANDARD "SB_MDDR10"
+// `define IOSTANDARD "SB_MDDR8"
+// `define IOSTANDARD "SB_MDDR4"
+// `define IOSTANDARD "SB_MDDR2"
+
+`ifdef CONN_INTERNAL_BITS
+module top (
+ inout pin,
+ input latch_in,
+ input clk_in,
+ input clk_out,
+ input oen,
+ input dout_0,
+ input dout_1,
+ output din_0,
+ output din_1
+);
+`else
+module top(pin);
+ inout pin;
+ wire latch_in = 0;
+ wire clk_in = 0;
+ wire clk_out = 0;
+ wire oen = 0;
+ wire dout_0 = 0;
+ wire dout_1 = 0;
+ wire din_0;
+ wire din_1;
+`endif
+ SB_IO_OD #(
+ .PIN_TYPE(`PINTYPE),
+ .NEG_TRIGGER(1'b0)
+ ) IO_PIN_I (
+ .PACKAGEPIN(pin),
+ .LATCHINPUTVALUE(latch_in),
+ .CLOCKENABLE(clk_en),
+ .INPUTCLK(clk_in),
+ .OUTPUTCLK(clk_out),
+ .OUTPUTENABLE(oen),
+ .DOUT0(dout_0),
+ .DOUT1(dout_1),
+ .DIN0(din_0),
+ .DIN1(din_1)
+ );
+endmodule
diff --git a/icefuzz/tests/sb_mac16.v b/icefuzz/tests/sb_mac16.v
new file mode 100644
index 0000000..c2fd850
--- /dev/null
+++ b/icefuzz/tests/sb_mac16.v
@@ -0,0 +1,65 @@
+module top(
+ input clk,
+ input rst,
+ input [7:0] a,
+ input [7:0] b,
+ output [15:0] y);
+ wire co;
+ wire [31:0] out;
+ SB_MAC16 i_sbmac16
+ (
+ .A(a),
+ .B(b),
+ .C(8'd0),
+ .D(8'd0),
+ .O(out),
+ .CLK(clk),
+ .IRSTTOP(rst),
+ .IRSTBOT(rst),
+ .ORSTTOP(rst),
+ .ORSTBOT(rst),
+ .AHOLD(1'b0),
+ .BHOLD(1'b0),
+ .CHOLD(1'b0),
+ .DHOLD(1'b0),
+ .OHOLDTOP(1'b0),
+ .OHOLDBOT(1'b0),
+ .OLOADTOP(1'b0),
+ .OLOADBOT(1'b0),
+ .ADDSUBTOP(1'b0),
+ .ADDSUBBOT(1'b0),
+ .CO(co),
+ .CI(1'b0),
+ .ACCUMCI(),
+ .ACCUMCO(),
+ .SIGNEXTIN(),
+ .SIGNEXTOUT()
+ );
+
+//Config: mult_8x8_pipeline_unsigned
+
+defparam i_sbmac16. B_SIGNED = 1'b0;
+defparam i_sbmac16. A_SIGNED = 1'b0;
+defparam i_sbmac16. MODE_8x8 = 1'b1;
+
+defparam i_sbmac16. BOTADDSUB_CARRYSELECT = 2'b00;
+defparam i_sbmac16. BOTADDSUB_UPPERINPUT = 1'b0;
+defparam i_sbmac16. BOTADDSUB_LOWERINPUT = 2'b00;
+defparam i_sbmac16. BOTOUTPUT_SELECT = 2'b10;
+
+defparam i_sbmac16. TOPADDSUB_CARRYSELECT = 2'b00;
+defparam i_sbmac16. TOPADDSUB_UPPERINPUT = 1'b0;
+defparam i_sbmac16. TOPADDSUB_LOWERINPUT = 2'b00;
+defparam i_sbmac16. TOPOUTPUT_SELECT = 2'b10;
+
+defparam i_sbmac16. PIPELINE_16x16_MULT_REG2 = 1'b0;
+defparam i_sbmac16. PIPELINE_16x16_MULT_REG1 = 1'b1;
+defparam i_sbmac16. BOT_8x8_MULT_REG = 1'b1;
+defparam i_sbmac16. TOP_8x8_MULT_REG = 1'b1;
+defparam i_sbmac16. D_REG = 1'b0;
+defparam i_sbmac16. B_REG = 1'b1;
+defparam i_sbmac16. A_REG = 1'b1;
+defparam i_sbmac16. C_REG = 1'b0;
+
+assign y = out[15:0];
+endmodule \ No newline at end of file
diff --git a/icefuzz/tests/sb_rgba_drv.pcf b/icefuzz/tests/sb_rgba_drv.pcf
new file mode 100644
index 0000000..94515d2
--- /dev/null
+++ b/icefuzz/tests/sb_rgba_drv.pcf
@@ -0,0 +1,3 @@
+set_io r_led 39
+set_io g_led 40
+set_io b_led 41
diff --git a/icefuzz/tests/sb_rgba_drv.v b/icefuzz/tests/sb_rgba_drv.v
new file mode 100644
index 0000000..e5a0c36
--- /dev/null
+++ b/icefuzz/tests/sb_rgba_drv.v
@@ -0,0 +1,32 @@
+module top(
+ input r_in,
+ input g_in,
+ input b_in,
+ output r_led,
+ output g_led,
+ output b_led);
+
+ wire curren;
+ wire rgbleden;
+
+ SB_RGBA_DRV RGBA_DRIVER (
+ .CURREN(curren),
+ .RGBLEDEN(rgbleden),
+ .RGB0PWM(r_in),
+ .RGB1PWM(r_in),
+ .RGB2PWM(r_in),
+ .RGB0(r_led),
+ .RGB1(g_led),
+ .RGB2(b_led)
+ );
+
+defparam RGBA_DRIVER.CURRENT_MODE = "0b0";
+defparam RGBA_DRIVER.RGB0_CURRENT = "0b000011";
+defparam RGBA_DRIVER.RGB1_CURRENT = "0b001111";
+defparam RGBA_DRIVER.RGB2_CURRENT = "0b111111";
+
+assign curren = 1'b1;
+assign rgbleden = 1'b1;
+
+
+endmodule \ No newline at end of file
diff --git a/icefuzz/tests/sb_spram256ka.v b/icefuzz/tests/sb_spram256ka.v
new file mode 100644
index 0000000..e1e1403
--- /dev/null
+++ b/icefuzz/tests/sb_spram256ka.v
@@ -0,0 +1,25 @@
+module top(
+ input clk,
+ input [13:0] addr,
+ input [7:0] din,
+ input wren,
+ input cs,
+ output [7:0] dout
+);
+
+SB_SPRAM256KA spram_i
+ (
+ .ADDRESS(addr),
+ .DATAIN(din),
+ .MASKWREN(4'b1111),
+ .WREN(wren),
+ .CHIPSELECT(cs),
+ .CLOCK(clk),
+ .STANDBY(1'b0),
+ .SLEEP(1'b0),
+ .POWEROFF(1'b0),
+ .DATAOUT(dout)
+ );
+
+
+endmodule \ No newline at end of file