Add UltraPlus IP to chipdb

1 files changed, 208 insertions, 1 deletions

diff --git a/icebox/icebox.py b/icebox/icebox.py
index 12d7fe1..a3816fd 100644
--- a/icebox/icebox.py
+++ b/icebox/icebox.py
@@ -4728,7 +4728,214 @@ extra_cells_db = {
             "RGB2_CURRENT_5":               (0, 30, "CBIT_7"),
             "CURRENT_MODE":                 (0, 28, "CBIT_4"),
             
-        }
+        },
+        ("I2C", (0, 31, 0)): {
+    		"I2CIRQ":                (0, 30, "slf_op_7"), 
+    		"I2CWKUP":               (0, 29, "slf_op_5"), 
+    		"I2C_ENABLE_0":          (13, 31, "cbit2usealt_in_0"), 
+    		"I2C_ENABLE_1":          (12, 31, "cbit2usealt_in_1"), 
+    		"SBACKO":                (0, 30, "slf_op_6"), 
+    		"SBADRI0":               (0, 30, "lutff_1/in_0"), 
+    		"SBADRI1":               (0, 30, "lutff_2/in_0"), 
+    		"SBADRI2":               (0, 30, "lutff_3/in_0"), 
+    		"SBADRI3":               (0, 30, "lutff_4/in_0"), 
+    		"SBADRI4":               (0, 30, "lutff_5/in_0"), 
+    		"SBADRI5":               (0, 30, "lutff_6/in_0"), 
+    		"SBADRI6":               (0, 30, "lutff_7/in_0"), 
+    		"SBADRI7":               (0, 29, "lutff_2/in_0"), 
+    		"SBCLKI":                (0, 30, "clk"), 
+    		"SBDATI0":               (0, 29, "lutff_5/in_0"), 
+    		"SBDATI1":               (0, 29, "lutff_6/in_0"), 
+    		"SBDATI2":               (0, 29, "lutff_7/in_0"), 
+    		"SBDATI3":               (0, 30, "lutff_0/in_3"), 
+    		"SBDATI4":               (0, 30, "lutff_5/in_1"), 
+    		"SBDATI5":               (0, 30, "lutff_6/in_1"), 
+    		"SBDATI6":               (0, 30, "lutff_7/in_1"), 
+    		"SBDATI7":               (0, 30, "lutff_0/in_0"), 
+    		"SBDATO0":               (0, 29, "slf_op_6"), 
+    		"SBDATO1":               (0, 29, "slf_op_7"), 
+    		"SBDATO2":               (0, 30, "slf_op_0"), 
+    		"SBDATO3":               (0, 30, "slf_op_1"), 
+    		"SBDATO4":               (0, 30, "slf_op_2"), 
+    		"SBDATO5":               (0, 30, "slf_op_3"), 
+    		"SBDATO6":               (0, 30, "slf_op_4"), 
+    		"SBDATO7":               (0, 30, "slf_op_5"), 
+    		"SBRWI":                 (0, 29, "lutff_4/in_0"), 
+    		"SBSTBI":                (0, 29, "lutff_3/in_0"), 
+    		"SCLI":                  (0, 29, "lutff_2/in_1"), 
+    		"SCLO":                  (0, 29, "slf_op_3"), 
+    		"SCLOE":                 (0, 29, "slf_op_4"), 
+    		"SDAI":                  (0, 29, "lutff_1/in_1"), 
+    		"SDAO":                  (0, 29, "slf_op_1"), 
+    		"SDAOE":                 (0, 29, "slf_op_2"), 
+    		"SDA_INPUT_DELAYED":     (12, 31, "SDA_input_delay"), 
+    		"SDA_OUTPUT_DELAYED":    (12, 31, "SDA_output_delay"), 
+    	},
+    	("I2C", (25, 31, 0)): {
+    		"I2CIRQ":                (25, 30, "slf_op_7"), 
+    		"I2CWKUP":               (25, 29, "slf_op_5"), 
+    		"I2C_ENABLE_0":          (19, 31, "cbit2usealt_in_0"), 
+    		"I2C_ENABLE_1":          (19, 31, "cbit2usealt_in_1"), 
+    		"SBACKO":                (25, 30, "slf_op_6"), 
+    		"SBADRI0":               (25, 30, "lutff_1/in_0"), 
+    		"SBADRI1":               (25, 30, "lutff_2/in_0"), 
+    		"SBADRI2":               (25, 30, "lutff_3/in_0"), 
+    		"SBADRI3":               (25, 30, "lutff_4/in_0"), 
+    		"SBADRI4":               (25, 30, "lutff_5/in_0"), 
+    		"SBADRI5":               (25, 30, "lutff_6/in_0"), 
+    		"SBADRI6":               (25, 30, "lutff_7/in_0"), 
+    		"SBADRI7":               (25, 29, "lutff_2/in_0"), 
+    		"SBCLKI":                (25, 30, "clk"), 
+    		"SBDATI0":               (25, 29, "lutff_5/in_0"), 
+    		"SBDATI1":               (25, 29, "lutff_6/in_0"), 
+    		"SBDATI2":               (25, 29, "lutff_7/in_0"), 
+    		"SBDATI3":               (25, 30, "lutff_0/in_3"), 
+    		"SBDATI4":               (25, 30, "lutff_5/in_1"), 
+    		"SBDATI5":               (25, 30, "lutff_6/in_1"), 
+    		"SBDATI6":               (25, 30, "lutff_7/in_1"), 
+    		"SBDATI7":               (25, 30, "lutff_0/in_0"), 
+    		"SBDATO0":               (25, 29, "slf_op_6"), 
+    		"SBDATO1":               (25, 29, "slf_op_7"), 
+    		"SBDATO2":               (25, 30, "slf_op_0"), 
+    		"SBDATO3":               (25, 30, "slf_op_1"), 
+    		"SBDATO4":               (25, 30, "slf_op_2"), 
+    		"SBDATO5":               (25, 30, "slf_op_3"), 
+    		"SBDATO6":               (25, 30, "slf_op_4"), 
+    		"SBDATO7":               (25, 30, "slf_op_5"), 
+    		"SBRWI":                 (25, 29, "lutff_4/in_0"), 
+    		"SBSTBI":                (25, 29, "lutff_3/in_0"), 
+    		"SCLI":                  (25, 29, "lutff_2/in_1"), 
+    		"SCLO":                  (25, 29, "slf_op_3"), 
+    		"SCLOE":                 (25, 29, "slf_op_4"), 
+    		"SDAI":                  (25, 29, "lutff_1/in_1"), 
+    		"SDAO":                  (25, 29, "slf_op_1"), 
+    		"SDAOE":                 (25, 29, "slf_op_2"), 
+    		"SDA_INPUT_DELAYED":     (19, 31, "SDA_input_delay"), 
+    		"SDA_OUTPUT_DELAYED":    (19, 31, "SDA_output_delay"), 
+    	},
+    	("SPI", (0, 0, 0)): {
+    		"MCSNO0":                (0, 21, "slf_op_2"), 
+    		"MCSNO1":                (0, 21, "slf_op_4"), 
+    		"MCSNO2":                (0, 21, "slf_op_7"), 
+    		"MCSNO3":                (0, 22, "slf_op_1"), 
+    		"MCSNOE0":               (0, 21, "slf_op_3"), 
+    		"MCSNOE1":               (0, 21, "slf_op_5"), 
+    		"MCSNOE2":               (0, 22, "slf_op_0"), 
+    		"MCSNOE3":               (0, 22, "slf_op_2"), 
+    		"MI":                    (0, 22, "lutff_0/in_1"), 
+    		"MO":                    (0, 20, "slf_op_6"), 
+    		"MOE":                   (0, 20, "slf_op_7"), 
+    		"SBACKO":                (0, 20, "slf_op_1"), 
+    		"SBADRI0":               (0, 19, "lutff_1/in_1"), 
+    		"SBADRI1":               (0, 19, "lutff_2/in_1"), 
+    		"SBADRI2":               (0, 20, "lutff_0/in_3"), 
+    		"SBADRI3":               (0, 20, "lutff_1/in_3"), 
+    		"SBADRI4":               (0, 20, "lutff_2/in_3"), 
+    		"SBADRI5":               (0, 20, "lutff_3/in_3"), 
+    		"SBADRI6":               (0, 20, "lutff_4/in_3"), 
+    		"SBADRI7":               (0, 20, "lutff_5/in_3"), 
+    		"SBCLKI":                (0, 20, "clk"), 
+    		"SBDATI0":               (0, 19, "lutff_1/in_3"), 
+    		"SBDATI1":               (0, 19, "lutff_2/in_3"), 
+    		"SBDATI2":               (0, 19, "lutff_3/in_3"), 
+    		"SBDATI3":               (0, 19, "lutff_4/in_3"), 
+    		"SBDATI4":               (0, 19, "lutff_5/in_3"), 
+    		"SBDATI5":               (0, 19, "lutff_6/in_3"), 
+    		"SBDATI6":               (0, 19, "lutff_7/in_3"), 
+    		"SBDATI7":               (0, 19, "lutff_0/in_1"), 
+    		"SBDATO0":               (0, 19, "slf_op_1"), 
+    		"SBDATO1":               (0, 19, "slf_op_2"), 
+    		"SBDATO2":               (0, 19, "slf_op_3"), 
+    		"SBDATO3":               (0, 19, "slf_op_4"), 
+    		"SBDATO4":               (0, 19, "slf_op_5"), 
+    		"SBDATO5":               (0, 19, "slf_op_6"), 
+    		"SBDATO6":               (0, 19, "slf_op_7"), 
+    		"SBDATO7":               (0, 20, "slf_op_0"), 
+    		"SBRWI":                 (0, 19, "lutff_0/in_3"), 
+    		"SBSTBI":                (0, 20, "lutff_6/in_3"), 
+    		"SCKI":                  (0, 22, "lutff_1/in_1"), 
+    		"SCKO":                  (0, 21, "slf_op_0"), 
+    		"SCKOE":                 (0, 21, "slf_op_1"), 
+    		"SCSNI":                 (0, 22, "lutff_2/in_1"), 
+    		"SI":                    (0, 22, "lutff_7/in_3"), 
+    		"SO":                    (0, 20, "slf_op_4"), 
+    		"SOE":                   (0, 20, "slf_op_5"), 
+    		"SPIIRQ":                (0, 20, "slf_op_2"), 
+    		"SPIWKUP":               (0, 20, "slf_op_3"), 
+    	},
+    	("SPI", (25, 0, 1)): {
+    		"MCSNO0":                (25, 21, "slf_op_2"), 
+    		"MCSNO1":                (25, 21, "slf_op_4"), 
+    		"MCSNO2":                (25, 21, "slf_op_7"), 
+    		"MCSNO3":                (25, 22, "slf_op_1"), 
+    		"MCSNOE0":               (25, 21, "slf_op_3"), 
+    		"MCSNOE1":               (25, 21, "slf_op_5"), 
+    		"MCSNOE2":               (25, 22, "slf_op_0"), 
+    		"MCSNOE3":               (25, 22, "slf_op_2"), 
+    		"MI":                    (25, 22, "lutff_0/in_1"), 
+    		"MO":                    (25, 20, "slf_op_6"), 
+    		"MOE":                   (25, 20, "slf_op_7"), 
+    		"SBACKO":                (25, 20, "slf_op_1"), 
+    		"SBADRI0":               (25, 19, "lutff_1/in_1"), 
+    		"SBADRI1":               (25, 19, "lutff_2/in_1"), 
+    		"SBADRI2":               (25, 20, "lutff_0/in_3"), 
+    		"SBADRI3":               (25, 20, "lutff_1/in_3"), 
+    		"SBADRI4":               (25, 20, "lutff_2/in_3"), 
+    		"SBADRI5":               (25, 20, "lutff_3/in_3"), 
+    		"SBADRI6":               (25, 20, "lutff_4/in_3"), 
+    		"SBADRI7":               (25, 20, "lutff_5/in_3"), 
+    		"SBCLKI":                (25, 20, "clk"), 
+    		"SBDATI0":               (25, 19, "lutff_1/in_3"), 
+    		"SBDATI1":               (25, 19, "lutff_2/in_3"), 
+    		"SBDATI2":               (25, 19, "lutff_3/in_3"), 
+    		"SBDATI3":               (25, 19, "lutff_4/in_3"), 
+    		"SBDATI4":               (25, 19, "lutff_5/in_3"), 
+    		"SBDATI5":               (25, 19, "lutff_6/in_3"), 
+    		"SBDATI6":               (25, 19, "lutff_7/in_3"), 
+    		"SBDATI7":               (25, 19, "lutff_0/in_1"), 
+    		"SBDATO0":               (25, 19, "slf_op_1"), 
+    		"SBDATO1":               (25, 19, "slf_op_2"), 
+    		"SBDATO2":               (25, 19, "slf_op_3"), 
+    		"SBDATO3":               (25, 19, "slf_op_4"), 
+    		"SBDATO4":               (25, 19, "slf_op_5"), 
+    		"SBDATO5":               (25, 19, "slf_op_6"), 
+    		"SBDATO6":               (25, 19, "slf_op_7"), 
+    		"SBDATO7":               (25, 20, "slf_op_0"), 
+    		"SBRWI":                 (25, 19, "lutff_0/in_3"), 
+    		"SBSTBI":                (25, 20, "lutff_6/in_3"), 
+    		"SCKI":                  (25, 22, "lutff_1/in_1"), 
+    		"SCKO":                  (25, 21, "slf_op_0"), 
+    		"SCKOE":                 (25, 21, "slf_op_1"), 
+    		"SCSNI":                 (25, 22, "lutff_2/in_1"), 
+    		"SI":                    (25, 22, "lutff_7/in_3"), 
+    		"SO":                    (25, 20, "slf_op_4"), 
+    		"SOE":                   (25, 20, "slf_op_5"), 
+    		"SPIIRQ":                (25, 20, "slf_op_2"), 
+    		"SPIWKUP":               (25, 20, "slf_op_3"), 
+    	},
+    	("LEDDA_IP", (0, 31, 2)): {
+    		"LEDDADDR0":             (0, 28, "lutff_4/in_0"), 
+    		"LEDDADDR1":             (0, 28, "lutff_5/in_0"), 
+    		"LEDDADDR2":             (0, 28, "lutff_6/in_0"), 
+    		"LEDDADDR3":             (0, 28, "lutff_7/in_0"), 
+    		"LEDDCLK":               (0, 29, "clk"), 
+    		"LEDDCS":                (0, 28, "lutff_2/in_0"), 
+    		"LEDDDAT0":              (0, 28, "lutff_2/in_1"), 
+    		"LEDDDAT1":              (0, 28, "lutff_3/in_1"), 
+    		"LEDDDAT2":              (0, 28, "lutff_4/in_1"), 
+    		"LEDDDAT3":              (0, 28, "lutff_5/in_1"), 
+    		"LEDDDAT4":              (0, 28, "lutff_6/in_1"), 
+    		"LEDDDAT5":              (0, 28, "lutff_7/in_1"), 
+    		"LEDDDAT6":              (0, 28, "lutff_0/in_0"), 
+    		"LEDDDAT7":              (0, 28, "lutff_1/in_0"), 
+    		"LEDDDEN":               (0, 28, "lutff_1/in_1"), 
+    		"LEDDEXE":               (0, 28, "lutff_0/in_1"), 
+    		"LEDDON":                (0, 29, "slf_op_0"), 
+    		"PWMOUT0":               (0, 28, "slf_op_4"), 
+    		"PWMOUT1":               (0, 28, "slf_op_5"), 
+    		"PWMOUT2":               (0, 28, "slf_op_6"), 
+    	},
+
     }
 }