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authorClifford Wolf <clifford@clifford.at>2017-07-21 16:56:15 +0200
committerClifford Wolf <clifford@clifford.at>2017-07-21 16:57:11 +0200
commit6124133269c7ff7bc550064e116c1bcfcbb412bf (patch)
tree543cb2f799f556074d82f073e3ad7ba586d685ad /examples
parentcb0a0f7ef81555cb5c8e51cabb806a302c92b91a (diff)
downloadicestorm-6124133269c7ff7bc550064e116c1bcfcbb412bf.tar.gz
icestorm-6124133269c7ff7bc550064e116c1bcfcbb412bf.tar.bz2
icestorm-6124133269c7ff7bc550064e116c1bcfcbb412bf.zip
Add icestick "checker" example
Diffstat (limited to 'examples')
-rw-r--r--examples/icestick/.gitignore9
-rw-r--r--examples/icestick/Makefile7
-rw-r--r--examples/icestick/checker.v55
-rw-r--r--examples/icestick/checker_tb.v40
4 files changed, 108 insertions, 3 deletions
diff --git a/examples/icestick/.gitignore b/examples/icestick/.gitignore
index bb30525..c854ccc 100644
--- a/examples/icestick/.gitignore
+++ b/examples/icestick/.gitignore
@@ -11,3 +11,12 @@ rs232demo_tb.vcd
rs232demo_syn.v
rs232demo_syntb
rs232demo_syntb.vcd
+checker.bin
+checker.blif
+checker.asc
+checker.rpt
+checker_tb
+checker_tb.vcd
+checker_syn.v
+checker_syntb
+checker_syntb.vcd
diff --git a/examples/icestick/Makefile b/examples/icestick/Makefile
index d687d14..8b8e741 100644
--- a/examples/icestick/Makefile
+++ b/examples/icestick/Makefile
@@ -1,5 +1,6 @@
PROJ = example
# PROJ = rs232demo
+# PROJ = checker
PIN_DEF = icestick.pcf
DEVICE = hx1k
@@ -22,16 +23,16 @@ all: $(PROJ).rpt $(PROJ).bin
iverilog -o $@ $^
%_tb.vcd: %_tb
- ./$< +vcd=$@
+ vvp -N $< +vcd=$@
%_syn.v: %.blif
- yosys -o $@ $^
+ yosys -p 'read_blif -wideports $^; write_verilog $@'
%_syntb: %_tb.v %_syn.v
iverilog -o $@ $^ `yosys-config --datdir/ice40/cells_sim.v`
%_syntb.vcd: %_syntb
- ./$< +vcd=$@
+ vvp -N $< +vcd=$@
prog: $(PROJ).bin
iceprog $<
diff --git a/examples/icestick/checker.v b/examples/icestick/checker.v
new file mode 100644
index 0000000..63c70fe
--- /dev/null
+++ b/examples/icestick/checker.v
@@ -0,0 +1,55 @@
+// A simple circuit that can be used to detect brownouts and other hardware issues
+
+module top (
+ input clk,
+ output LED1,
+ output LED2,
+ output LED3,
+ output LED4,
+ output LED5
+);
+ reg [7:0] reset_counter = 0;
+ reg resetn = 0;
+
+ always @(posedge clk) begin
+ reset_counter <= reset_counter + 1;
+ resetn <= resetn | &reset_counter;
+ end
+
+ reg error, rdmode, rdfin;
+
+ reg [31:0] scratchpad [0:1023];
+ reg [31:0] xorshift32_state;
+ reg [9:0] index;
+
+ reg [31:0] next_xorshift32_state;
+
+ always @* begin
+ next_xorshift32_state = xorshift32_state ^ ( xorshift32_state << 13);
+ next_xorshift32_state = next_xorshift32_state ^ (next_xorshift32_state >> 17);
+ next_xorshift32_state = next_xorshift32_state ^ (next_xorshift32_state << 5);
+ end
+
+ always @(posedge clk) begin
+ xorshift32_state <= &index ? 123456789 : next_xorshift32_state;
+ index <= index + 1;
+
+ if (!resetn) begin
+ xorshift32_state <= 123456789;
+ index <= 0;
+ error <= 0;
+ rdmode <= 0;
+ rdfin <= 0;
+ end else
+ if (!rdmode) begin
+ scratchpad[index] <= xorshift32_state;
+ rdmode <= &index;
+ end else begin
+ if (scratchpad[index] != xorshift32_state) error <= 1;
+ rdfin <= rdfin || &index;
+ end
+ end
+
+ wire ok = resetn && rdfin && !error;
+ assign LED1 = error, LED2 = error, LED3 = error, LED4 = error, LED5 = ok;
+endmodule
diff --git a/examples/icestick/checker_tb.v b/examples/icestick/checker_tb.v
new file mode 100644
index 0000000..241c89e
--- /dev/null
+++ b/examples/icestick/checker_tb.v
@@ -0,0 +1,40 @@
+module testbench;
+ reg clk;
+ always #5 clk = (clk === 1'b0);
+
+ wire ok;
+
+ top uut (
+ .clk(clk),
+ .LED5(ok)
+ );
+
+ reg [4095:0] vcdfile;
+
+ initial begin
+ if ($value$plusargs("vcd=%s", vcdfile)) begin
+ $dumpfile(vcdfile);
+ $dumpvars(0, testbench);
+ end
+ end
+
+ initial begin
+ @(posedge ok);
+ @(negedge ok);
+ $display("ERROR: detected falling edge on OK pin!");
+ $stop;
+ end
+
+ initial begin
+ repeat (3000) @(posedge clk);
+
+ if (!ok) begin
+ $display("ERROR: OK pin not asserted after 3000 cycles!");
+ $stop;
+ end
+
+ repeat (10000) @(posedge clk);
+ $display("SUCCESS: OK pin still asserted after 10000 cycles.");
+ $finish;
+ end
+endmodule