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| author | Clifford Wolf <clifford@clifford.at> | 2018-04-08 13:34:44 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2018-04-08 13:34:44 +0200 |
| commit | 495f5714113497108cf304a83ed2c32d2f1daf7a (patch) | |
| tree | 4f39dc254db2d7a1e031516bd59d661a3fde2563 /docs | |
| parent | 21809924600a7d6608ba0f2d098ee3ae30f64834 (diff) | |
| download | icestorm-495f5714113497108cf304a83ed2c32d2f1daf7a.tar.gz icestorm-495f5714113497108cf304a83ed2c32d2f1daf7a.tar.bz2 icestorm-495f5714113497108cf304a83ed2c32d2f1daf7a.zip | |
Add link to "IceStorm Learners Documentation"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'docs')
| -rw-r--r-- | docs/index.html | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/docs/index.html b/docs/index.html index 6b3ff5e..a471641 100644 --- a/docs/index.html +++ b/docs/index.html @@ -534,6 +534,7 @@ Links to related projects. Contact me at clifford@clifford.at if you have an int <li><a href="https://media.ccc.de/v/32c3-7139-a_free_and_open_source_verilog-to-bitstream_flow_for_ice40_fpgas">A Free and Open Source Verilog-to-Bitstream Flow for iCE40 FPGAs [32c3]</a> <li><a href="https://www.youtube.com/watch?v=s7fNTF8nd8A">Synthesizing Verilog for Lattice ICE40 FPGAs (Paul Martin)</a> <li><a href="https://github.com/Obijuan/open-fpga-verilog-tutorial/wiki">A Spanish FPGA Tutorial using IceStorm</a> +<li><a href="http://hedmen.org/icestorm-doc/icestorm.html">IceStorm Learner’s Documentation</a> </ul> <h3>Other FPGA reverse engineering projects</h3> |