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authorDavid Shah <davey1576@gmail.com>2018-04-02 15:01:45 +0100
committerDavid Shah <davey1576@gmail.com>2018-04-02 15:01:45 +0100
commit4f4409ad86a898162a52d192aa153bd5a730d8ff (patch)
tree1461478bf73bdf71f35d6bca501a6bd87d0e6d12
parent21809924600a7d6608ba0f2d098ee3ae30f64834 (diff)
downloadicestorm-4f4409ad86a898162a52d192aa153bd5a730d8ff.tar.gz
icestorm-4f4409ad86a898162a52d192aa153bd5a730d8ff.tar.bz2
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Add BG121 package variant and update docs
-rw-r--r--docs/index.html14
-rw-r--r--icebox/icebox.py190
2 files changed, 198 insertions, 6 deletions
diff --git a/docs/index.html b/docs/index.html
index 6b3ff5e..8d0e2c0 100644
--- a/docs/index.html
+++ b/docs/index.html
@@ -39,7 +39,9 @@ fully open source Verilog-to-Bitstream flow for iCE40 FPGAs.
<p>
The focus of the project is on the iCE40 LP/HX 1K/4K/8K chips. (Most of the
-work was done on HX1K-TQ144 and HX8K-CT256 parts.)
+work was done on HX1K-TQ144 and HX8K-CT256 parts.) The iCE40 UltraPlus parts
+are also supported, including DSPs, oscillators, RGB and SPRAM. iCE40 LM, Ultra
+and UltraLite parts are not yet supported.
</p>
<h2>Why the Lattice iCE40?</h2>
@@ -74,6 +76,8 @@ Here is a list of currently supported parts and the corresponding options for ar
<table class="ctab">
<tr><th>Part</th><th>Package</th><th>Pin Spacing</th><th>I/Os</th><th>arachne-pnr opts</th><th>icetime opts</th></tr>
<tr><td>iCE40-LP1K-SWG16TR</td><td>16-ball WLCSP (1.40 x 1.48 mm)</td><td>0.35 mm</td><td>10</td><td>-d 1k -P swg16tr</td><td>-d lp1k</td></tr>
+<tr><td>iCE40-UP3K-UWG30</td><td>30-ball WLCSP (2.15 x 2.55 mm)</td><td>0.40 mm</td><td>21</td><td>-d 5k -P uwg30</td><td>-d up5k</td></tr>
+<tr><td>iCE40-UP5K-UWG30</td><td>30-ball WLCSP (2.15 x 2.55 mm)</td><td>0.40 mm</td><td>21</td><td>-d 5k -P uwg30</td><td>-d up5k</td></tr>
<tr><td>iCE40-LP384-CM36</td><td>36-ball ucBGA (2.5 x 2.5 mm)</td><td>0.40 mm</td><td>25</td><td>-d 384 -P cm36</td><td>-d lp384</td></tr>
<tr><td>iCE40-LP1K-CM36</td><td>36-ball ucBGA (2.5 x 2.5 mm)</td><td>0.40 mm</td><td>25</td><td>-d 1k -P cm36</td><td>-d lp1k</td></tr>
<tr><td>iCE40-LP384-CM49</td><td>49-ball ucBGA (3 x 3 mm)</td><td>0.40 mm</td><td>37</td><td>-d 384 -P cm49</td><td>-d lp384</td></tr>
@@ -88,6 +92,7 @@ Here is a list of currently supported parts and the corresponding options for ar
<tr><td>iCE40-LP8K-CM225</td><td>225-ball ucBGA (7 x 7 mm)</td><td>0.40 mm</td><td>178</td><td>-d 8k -P cm225</td><td>-d lp8k</td></tr>
<tr><td>iCE40-HX8K-CM225</td><td>225-ball ucBGA (7 x 7 mm)</td><td>0.40 mm</td><td>178</td><td>-d 8k -P cm225</td><td>-d hx8k</td></tr>
<tr><td>iCE40-LP384-QN32</td><td>32-pin QFN (5 x 5 mm)</td><td>0.50 mm</td><td>21</td><td>-d 384 -P qn32</td><td>-d lp384</td></tr>
+<tr><td>iCE40-UP5K-SG48</td><td>48-pin QFN (7 x 7 mm)</td><td>0.50 mm</td><td>39</td><td>-d 5k -P sg48</td><td>-d up5k</td></tr>
<tr><td>iCE40-LP1K-QN84</td><td>84-pin QFNS (7 x 7 mm)</td><td>0.50 mm</td><td>67</td><td>-d 1k -P qn84</td><td>-d lp1k</td></tr>
<tr><td>iCE40-LP1K-CB81</td><td>81-ball csBGA (5 x 5 mm)</td><td>0.50 mm</td><td>62</td><td>-d 1k -P cb81</td><td>-d lp1k</td></tr>
<tr><td>iCE40-LP1K-CB121</td><td>121-ball csBGA (6 x 6 mm)</td><td>0.50 mm</td><td>92</td><td>-d 1k -P cb121</td><td>-d lp1k</td></tr>
@@ -97,15 +102,12 @@ Here is a list of currently supported parts and the corresponding options for ar
<tr><td>iCE40-HX1K-VQ100</td><td>100-pin VQFP (14 x 14 mm)</td><td>0.50 mm</td><td>72</td><td>-d 1k -P vq100</td><td>-d hx1k</td></tr>
<tr><td>iCE40-HX1K-TQ144</td><td>144-pin TQFP (20 x 20 mm)</td><td>0.50 mm</td><td>96</td><td>-d 1k -P tq144</td><td>-d hx1k</td></tr>
<tr><td>iCE40-HX4K-TQ144</td><td>144-pin TQFP (20 x 20 mm)</td><td>0.50 mm</td><td>107</td><td>-d 8k -P tq144:4k</td><td>-d hx8k</td></tr>
+<tr><td>iCE40-HX4K-BG121</td><td>121-ball caBGA (9 x 9 mm)</td><td>0.80 mm</td><td>93</td><td>-d 8k -P bg121:4k</td><td>-d hx8k</td></tr>
+<tr><td>iCE40-HX8K-BG121</td><td>121-ball caBGA (9 x 9 mm)</td><td>0.80 mm</td><td>93</td><td>-d 8k -P bg121</td><td>-d hx8k</td></tr>
<tr><td>iCE40-HX8K-CT256</td><td>256-ball caBGA (14 x 14 mm)</td><td>0.80 mm</td><td>206</td><td>-d 8k -P ct256</td><td>-d hx8k</td></tr>
</table>
<p>
- Experimental support is also included for one iCE40 UltraPlus device, the iCE40-UP5K-SG48, including support for some of
- the new UltraPlus features such as DSPs, SPRAM and internal oscillators.
-</p>
-
-<p>
Current work focuses on further improving our timing analysis flow.
</p>
diff --git a/icebox/icebox.py b/icebox/icebox.py
index fff7b99..af55719 100644
--- a/icebox/icebox.py
+++ b/icebox/icebox.py
@@ -3459,6 +3459,101 @@ pinloc_db = {
( "L8", 29, 0, 0),
("L10", 31, 0, 0),
],
+ "8k-bg121:4k": [
+ ( "A1", 2, 33, 0),
+ ( "A2", 3, 33, 1),
+ ( "A3", 3, 33, 0),
+ ( "A4", 9, 33, 0),
+ ( "A5", 11, 33, 0),
+ ( "A6", 11, 33, 1),
+ ( "A7", 19, 33, 1),
+ ( "A8", 20, 33, 1),
+ ( "A9", 26, 33, 1),
+ ("A10", 30, 33, 1),
+ ("A11", 31, 33, 1),
+ ( "B1", 0, 30, 1),
+ ( "B2", 0, 30, 0),
+ ( "B3", 4, 33, 0),
+ ( "B4", 5, 33, 0),
+ ( "B5", 10, 33, 1),
+ ( "B6", 16, 33, 1),
+ ( "B7", 17, 33, 0),
+ ( "B8", 27, 33, 0),
+ ( "B9", 28, 33, 1),
+ ("B11", 33, 28, 0),
+ ( "C1", 0, 25, 0),
+ ( "C2", 0, 25, 1),
+ ( "C3", 0, 27, 0),
+ ( "C4", 0, 27, 1),
+ ( "C7", 20, 33, 0),
+ ( "C8", 26, 33, 0),
+ ( "C9", 29, 33, 1),
+ ("C11", 33, 27, 1),
+ ( "D1", 0, 22, 0),
+ ( "D2", 0, 21, 1),
+ ( "D3", 0, 21, 0),
+ ( "D5", 8, 33, 1),
+ ( "D7", 25, 33, 0),
+ ( "D9", 33, 21, 0),
+ ("D10", 33, 24, 1),
+ ("D11", 33, 23, 1),
+ ( "E1", 0, 22, 1),
+ ( "E2", 0, 20, 1),
+ ( "E3", 0, 20, 0),
+ ( "E8", 33, 20, 1),
+ ( "E9", 33, 19, 1),
+ ("E10", 33, 17, 0),
+ ("E11", 33, 21, 1),
+ ( "F1", 0, 18, 1),
+ ( "F2", 0, 18, 0),
+ ( "F3", 0, 17, 0),
+ ( "F4", 0, 17, 1),
+ ( "F9", 33, 15, 0),
+ ("F10", 33, 14, 1),
+ ("F11", 33, 16, 1),
+ ( "G1", 0, 16, 1),
+ ( "G2", 0, 16, 0),
+ ( "G3", 0, 12, 1),
+ ( "G8", 33, 5, 1),
+ ( "G9", 33, 10, 1),
+ ("G10", 33, 6, 1),
+ ("G11", 33, 11, 0),
+ ( "H1", 0, 11, 1),
+ ( "H2", 0, 11, 0),
+ ( "H3", 0, 12, 0),
+ ( "H7", 20, 0, 1),
+ ( "H9", 29, 0, 1),
+ ("H10", 33, 4, 1),
+ ("H11", 33, 6, 0),
+ ( "J1", 0, 6, 1),
+ ( "J2", 0, 4, 0),
+ ( "J3", 4, 0, 1),
+ ( "J4", 8, 0, 0),
+ ( "J5", 15, 0, 0),
+ ( "J7", 20, 0, 0),
+ ( "J8", 22, 0, 1),
+ ( "J9", 30, 0, 1),
+ ("J10", 33, 5, 0),
+ ("J11", 33, 3, 1),
+ ( "K1", 0, 6, 0),
+ ( "K2", 0, 4, 1),
+ ( "K3", 7, 0, 1),
+ ( "K4", 12, 0, 1),
+ ( "K5", 15, 0, 1),
+ ( "K6", 17, 0, 0),
+ ( "K7", 21, 0, 1),
+ ( "K9", 30, 0, 0),
+ ("K10", 31, 0, 1),
+ ("K11", 33, 4, 0),
+ ( "L1", 4, 0, 0),
+ ( "L2", 6, 0, 1),
+ ( "L3", 11, 0, 1),
+ ( "L4", 12, 0, 0),
+ ( "L5", 16, 0, 1),
+ ( "L7", 24, 0, 0),
+ ( "L8", 29, 0, 0),
+ ("L10", 31, 0, 0),
+ ],
"8k-cm225:4k": [
( "A1", 1, 33, 1),
( "A2", 3, 33, 1),
@@ -3788,6 +3883,101 @@ pinloc_db = {
( "L8", 29, 0, 0),
("L10", 31, 0, 0),
],
+ "8k-bg121": [
+ ( "A1", 2, 33, 0),
+ ( "A2", 3, 33, 1),
+ ( "A3", 3, 33, 0),
+ ( "A4", 9, 33, 0),
+ ( "A5", 11, 33, 0),
+ ( "A6", 11, 33, 1),
+ ( "A7", 19, 33, 1),
+ ( "A8", 20, 33, 1),
+ ( "A9", 26, 33, 1),
+ ("A10", 30, 33, 1),
+ ("A11", 31, 33, 1),
+ ( "B1", 0, 30, 1),
+ ( "B2", 0, 30, 0),
+ ( "B3", 4, 33, 0),
+ ( "B4", 5, 33, 0),
+ ( "B5", 10, 33, 1),
+ ( "B6", 16, 33, 1),
+ ( "B7", 17, 33, 0),
+ ( "B8", 27, 33, 0),
+ ( "B9", 28, 33, 1),
+ ("B11", 33, 28, 0),
+ ( "C1", 0, 25, 0),
+ ( "C2", 0, 25, 1),
+ ( "C3", 0, 27, 0),
+ ( "C4", 0, 27, 1),
+ ( "C7", 20, 33, 0),
+ ( "C8", 26, 33, 0),
+ ( "C9", 29, 33, 1),
+ ("C11", 33, 27, 1),
+ ( "D1", 0, 22, 0),
+ ( "D2", 0, 21, 1),
+ ( "D3", 0, 21, 0),
+ ( "D5", 8, 33, 1),
+ ( "D7", 25, 33, 0),
+ ( "D9", 33, 21, 0),
+ ("D10", 33, 24, 1),
+ ("D11", 33, 23, 1),
+ ( "E1", 0, 22, 1),
+ ( "E2", 0, 20, 1),
+ ( "E3", 0, 20, 0),
+ ( "E8", 33, 20, 1),
+ ( "E9", 33, 19, 1),
+ ("E10", 33, 17, 0),
+ ("E11", 33, 21, 1),
+ ( "F1", 0, 18, 1),
+ ( "F2", 0, 18, 0),
+ ( "F3", 0, 17, 0),
+ ( "F4", 0, 17, 1),
+ ( "F9", 33, 15, 0),
+ ("F10", 33, 14, 1),
+ ("F11", 33, 16, 1),
+ ( "G1", 0, 16, 1),
+ ( "G2", 0, 16, 0),
+ ( "G3", 0, 12, 1),
+ ( "G8", 33, 5, 1),
+ ( "G9", 33, 10, 1),
+ ("G10", 33, 6, 1),
+ ("G11", 33, 11, 0),
+ ( "H1", 0, 11, 1),
+ ( "H2", 0, 11, 0),
+ ( "H3", 0, 12, 0),
+ ( "H7", 20, 0, 1),
+ ( "H9", 29, 0, 1),
+ ("H10", 33, 4, 1),
+ ("H11", 33, 6, 0),
+ ( "J1", 0, 6, 1),
+ ( "J2", 0, 4, 0),
+ ( "J3", 4, 0, 1),
+ ( "J4", 8, 0, 0),
+ ( "J5", 15, 0, 0),
+ ( "J7", 20, 0, 0),
+ ( "J8", 22, 0, 1),
+ ( "J9", 30, 0, 1),
+ ("J10", 33, 5, 0),
+ ("J11", 33, 3, 1),
+ ( "K1", 0, 6, 0),
+ ( "K2", 0, 4, 1),
+ ( "K3", 7, 0, 1),
+ ( "K4", 12, 0, 1),
+ ( "K5", 15, 0, 1),
+ ( "K6", 17, 0, 0),
+ ( "K7", 21, 0, 1),
+ ( "K9", 30, 0, 0),
+ ("K10", 31, 0, 1),
+ ("K11", 33, 4, 0),
+ ( "L1", 4, 0, 0),
+ ( "L2", 6, 0, 1),
+ ( "L3", 11, 0, 1),
+ ( "L4", 12, 0, 0),
+ ( "L5", 16, 0, 1),
+ ( "L7", 24, 0, 0),
+ ( "L8", 29, 0, 0),
+ ("L10", 31, 0, 0),
+ ],
"8k-cm225": [
( "A1", 1, 33, 1),
( "A2", 3, 33, 1),