blob: 9152a1e31dbad8b45bafdb5f309b12b386605b36 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
|
-- Copyright (C) 2001 Bill Billowitch.
-- Some of the work to develop this test suite was done with Air Force
-- support. The Air Force and Bill Billowitch assume no
-- responsibilities for this software.
-- This file is part of VESTs (Vhdl tESTs).
-- VESTs is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at
-- your option) any later version.
-- VESTs is distributed in the hope that it will be useful, but WITHOUT
-- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
-- You should have received a copy of the GNU General Public License
-- along with VESTs; if not, write to the Free Software Foundation,
-- Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-- ---------------------------------------------------------------------
--
-- $Id: tc885.vhd,v 1.2 2001-10-26 16:30:01 paw Exp $
-- $Revision: 1.2 $
--
-- ---------------------------------------------------------------------
ENTITY c10s01b00x00p10n01i00885ent IS
END c10s01b00x00p10n01i00885ent;
ARCHITECTURE c10s01b00x00p10n01i00885arch OF c10s01b00x00p10n01i00885ent IS
signal S: INTEGER := 356;
BEGIN
TESTING: PROCESS
constant I: INTEGER := 105; -- loop parameter has same name
variable k: integer := 0;
BEGIN
-- assign process constant I to S
S <= I;
wait for 1 ns;
assert ( S = 105 )
report "constant not properly assigned to signal"
severity FAILURE;
-- loop parameter has same name as constant declared in process
for I in 1 to 5 loop
-- assign loop parameter I to S
S <= I;
wait for 1 ns;
if ((S<1) or (S>5)) then
k := 1;
end if;
assert ( ( S >= 1 ) and ( S <= 5 ) )
report "loop parameter not properly assigned to signal"
severity FAILURE;
end loop;
assert NOT( k=0 )
report "***PASSED TEST: c10s01b00x00p10n01i00885"
severity NOTE;
assert ( k=0 )
report "***FAILED TEST: c10s01b00x00p10n01i00885 - A declaration region is formed by the text of a loop statement."
severity ERROR;
wait;
END PROCESS TESTING;
END c10s01b00x00p10n01i00885arch;
|
