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entity tb_snum01 is
end tb_snum01;
library ieee;
use ieee.std_logic_1164.all;
architecture behav of tb_snum01 is
signal r : boolean;
begin
cmp01_1: entity work.snum01
port map (r);
process
begin
wait for 1 ns;
assert r severity failure;
wait;
end process;
end behav;
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