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#! /bin/sh
. ../../testenv.sh
analyze repro.vhdl
elab repro
if ghdl_has_feature repro vcd; then
simulate repro --vcd=repro-std.vcd
simulate repro --vcd=repro-vlg.vcd --vcd-4states
if fgrep -q "U!" repro-vlg.vcd; then
echo "error: non-verilog state in vcd"
exit 1;
fi
fi
clean
rm -f repro-*.vcd
echo "Test successful"
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