testsuite/gna/issue1381/repro3.vhdl


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entity repro3 is
  port (n : out natural);
end;

architecture behav of repro3 is
  impure function f(a : bit_vector) return bit_vector
  is
    subtype st is natural range 1 to n;
  begin
    return a;
  end f;
begin
  assert f("01") = "01";
end behav;