1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
|
# =============================================================================
# ____ _ _ ____ _ _
# _ __ _ _ / ___| | | | _ \| | __| | ___ _ __ ___
# | '_ \| | | | | _| |_| | | | | | / _` |/ _ \| '_ ` _ \
# | |_) | |_| | |_| | _ | |_| | |___ | (_| | (_) | | | | | |
# | .__/ \__, |\____|_| |_|____/|_____(_)__,_|\___/|_| |_| |_|
# |_| |___/
# =============================================================================
# Authors:
# Patrick Lehmann
#
# Package module: DOM: Interface items (e.g. generic or port)
#
# License:
# ============================================================================
# Copyright (C) 2019-2021 Tristan Gingold
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <gnu.org/licenses>.
#
# SPDX-License-Identifier: GPL-2.0-or-later
# ============================================================================
from typing import List, Iterator
from pydecor import export
from pyVHDLModel.SyntaxModel import (
EntitySymbol as VHDLModel_EntitySymbol,
SimpleSubtypeSymbol as VHDLModel_SimpleSubtypeSymbol,
ConstrainedScalarSubtypeSymbol as VHDLModel_ConstrainedScalarSubtypeSymbol,
ConstrainedCompositeSubtypeSymbol as VHDLModel_ConstrainedCompositeSubtypeSymbol,
SimpleObjectOrFunctionCallSymbol as VHDLModel_SimpleObjectOrFunctionCallSymbol,
IndexedObjectOrFunctionCallSymbol as VHDLModel_IndexedObjectOrFunctionCallSymbol,
Constraint,
Name,
)
from pyGHDL.libghdl._types import Iir
from pyGHDL.dom import DOMMixin
from pyGHDL.dom.Range import Range
__all__ = []
@export
class EntitySymbol(VHDLModel_EntitySymbol, DOMMixin):
def __init__(self, node: Iir, entityName: Name):
super().__init__(entityName)
DOMMixin.__init__(self, node)
@export
class SimpleSubtypeSymbol(VHDLModel_SimpleSubtypeSymbol, DOMMixin):
def __init__(self, node: Iir, subtypeName: Name):
if isinstance(subtypeName, (List, Iterator)):
subtypeName = ".".join(subtypeName)
super().__init__(subtypeName=subtypeName)
DOMMixin.__init__(self, node)
@export
class ConstrainedScalarSubtypeSymbol(
VHDLModel_ConstrainedScalarSubtypeSymbol, DOMMixin
):
def __init__(self, node: Iir, subtypeName: Name, rng: Range = None):
super().__init__(subtypeName, rng)
DOMMixin.__init__(self, node)
@classmethod
def parse(cls, node: Iir):
pass
@export
class ConstrainedCompositeSubtypeSymbol(
VHDLModel_ConstrainedCompositeSubtypeSymbol, DOMMixin
):
def __init__(
self, node: Iir, subtypeName: Name, constraints: List[Constraint] = None
):
super().__init__(subtypeName, constraints)
DOMMixin.__init__(self, node)
@classmethod
def parse(cls, node: Iir):
pass
@export
class SimpleObjectOrFunctionCallSymbol(
VHDLModel_SimpleObjectOrFunctionCallSymbol, DOMMixin
):
@classmethod
def parse(cls, node: Iir):
from pyGHDL.dom._Translate import GetNameFromNode
name = GetNameFromNode(node)
return cls(name)
@export
class IndexedObjectOrFunctionCallSymbol(
VHDLModel_IndexedObjectOrFunctionCallSymbol, DOMMixin
):
def __init__(self, node: Iir, name: Name):
super().__init__(name)
DOMMixin.__init__(self, node)
@classmethod
def parse(cls, node: Iir):
from pyGHDL.dom._Translate import GetNameFromNode
name = GetNameFromNode(node)
return cls(node, name)
|