iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Disable color diagnotics by default on Windows.	Tristan Gingold	2017-02-25	1	-3/+19
*	Eval_Array_Attribute: Handle 'Subtype.	Tristan Gingold	2017-02-24	1	-1/+2
*	evaluation: add comment for fp exponentiation	Tristan Gingold	2017-02-24	1	-0/+10
*	path_name/instance_name: handle protected types.	Tristan Gingold	2017-02-23	1	-1/+10
*	translate: factorize code for function call	Tristan Gingold	2017-02-23	1	-19/+2
*	vhdl08: more on unbounded records (WIP)	Tristan Gingold	2017-02-23	3	-6/+7
*	Disp driving process for --disp-sources	Tristan Gingold	2017-02-22	3	-3/+9
*	rtis/vcd/ghw: handle record subtypes.	Tristan Gingold	2017-02-22	8	-101/+179
*	unbounded records: add rti support (WIP)	Tristan Gingold	2017-02-21	13	-277/+438
*	vhdl08: unbounded records (WIP)	Tristan Gingold	2017-02-21	1	-17/+47
*	Disable warnings while analyzing dependences.	Tristan Gingold	2017-02-21	3	-14/+53
*	vhdl08: unbounded records - WIP	Tristan Gingold	2017-02-17	4	-20/+28
*	synth: reverse bit order for indexed names.	Tristan Gingold	2017-02-16	1	-2/+2
*	synth: defer gates removal after at end of entity synthesis.	Tristan Gingold	2017-02-15	6	-29/+95
*	synth: Fix handling of iir_downto in synth_indexed_name.	Tristan Gingold	2017-02-15	1	-1/+1
*	synth-expr.adb: fix Synth_Indexed_Name.	Tristan Gingold	2017-02-13	1	-2/+2
*	libraries: fix incorrect use of scanner during sem.	Tristan Gingold	2017-02-13	1	-6/+4
*	Library: unload library file after parsing it.	Tristan Gingold	2017-02-13	3	-42/+55
*	files_map: fix crash in Debug_Source_File	Tristan Gingold	2017-02-12	1	-4/+10
*	vhdl08: unbounded records (WIP)	Tristan Gingold	2017-02-12	11	-259/+395
*	libghdlsynth: can generate so/dll file.	Tristan Gingold	2017-02-07	1	-12/+37
*	Add color diagnostics, show diagnostic option.	Tristan Gingold	2017-02-06	8	-54/+209
*	Apply No_Return pragma only on specs. Create specs if needed.	Tristan Gingold	2017-02-06	2	-4/+10
*	netlists-iterators: fix for gnat gpl 2014	Tristan Gingold	2017-02-02	1	-77/+77
*	Add ghdlsynth in ghdl_simul	Tristan Gingold	2017-01-31	3	-1/+13
*	simulate: reorder block list, support Concurrent_Simple_Signal_Assignment	Tristan Gingold	2017-01-31	4	-25/+60
*	Add netlist generation infrastructure.	Tristan Gingold	2017-01-31	44	-0/+7531
*	Fix ghdlsimul build.	Tristan Gingold	2017-01-31	2	-4/+5
*	WIP: unbounded records (set record subtype staticness)	Tristan Gingold	2017-01-31	8	-60/+151
*	Do not emit assert error for '-' in matching equality/inequality.	Tristan Gingold	2017-01-24	1	-14/+0
*	adjust previous patch.	Tristan Gingold	2017-01-23	1	-1/+2
*	Allow 'subtype and 'base for 'simple_name prefix.	Tristan Gingold	2017-01-23	5	-81/+112
*	WIP: translate size of unbounded records.	Tristan Gingold	2017-01-23	5	-13/+80
*	iirs: add base_element_declaration to record_element_constraint.	Tristan Gingold	2017-01-23	3	-231/+240
*	eval_is_in_bound: make it more tolerant.	Tristan Gingold	2017-01-19	6	-75/+60
*	evaluation: work-around gnatgpl 2014 bug.	Tristan Gingold	2017-01-19	1	-3/+6
*	evaluation: handle null array in aggregate_to_simple_aggregate	Tristan Gingold	2017-01-18	1	-1/+1
*	evaluation: handle vector minimum and maximum.	Tristan Gingold	2017-01-18	2	-6/+89
*	canon: fix thinko for sequential conditional signal assignment.	Tristan Gingold	2017-01-18	1	-4/+2
*	wip for unbounded records.	Tristan Gingold	2017-01-16	1	-13/+86
*	sem_names: finish sem of 'subtype prefix.	Tristan Gingold	2017-01-16	1	-3/+3
*	sem_scopes: support signal attributes in entities.	Tristan Gingold	2017-01-15	1	-1/+2
*	canon: handle all signal attributes in canon_extract_sensitivity.	Tristan Gingold	2017-01-15	1	-10/+2
*	vhdl2008: handle 'Subtype as a type name and in disp_vhdl	Tristan Gingold	2017-01-15	4	-8/+25
*	Add xref_keyword for PSL keywords that aren't reserved words.	Tristan Gingold	2017-01-15	4	-2/+43
*	disp_vhdl: handle psl default clock in declarative part.	Tristan Gingold	2017-01-13	2	-56/+63
*	vhdl08: implement 'subtype attribute	Tristan Gingold	2017-01-13	10	-74/+201
*	Add 'Image and 'Value for i64.	Tristan Gingold	2017-01-13	4	-14/+24
*	vhdl08: allow PSL default clock declaration in block declarative parts.	Tristan Gingold	2017-01-13	8	-85/+131
*	WIP for unconstrained records.	Tristan Gingold	2017-01-13	3	-15/+36