iCE40/ghdl - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	synth: handle file_open.	Tristan Gingold	2020-02-18	3	-0/+48
*	synth-environment: handle unassigned outputs.	Tristan Gingold	2020-02-18	1	-6/+8
*	netlists-cleanup: refactoring.	Tristan Gingold	2020-02-18	1	-12/+17
*	synth-insts: handle slices in individual associations.	Tristan Gingold	2020-02-18	1	-0/+21
*	vhdl-sem_scopes: handle anonymous signal declarations.	Tristan Gingold	2020-02-18	1	-1/+2
*	vhdl-configuration: ignore configuration for top_level_entity.	Tristan Gingold	2020-02-18	1	-4/+4
*	synth-expr: handle anonymous signal declarations.	Tristan Gingold	2020-02-18	2	-6/+10
*	vhdl-sem_assocs: recurse for individual associations.	Tristan Gingold	2020-02-17	1	-23/+64
*	synth: allow constant condition for if-generate statement.	Tristan Gingold	2020-02-17	1	-0/+1
*	synth: add mdff.	Tristan Gingold	2020-02-17	4	-12/+88
*	netlists-inference: remove useless code.	Tristan Gingold	2020-02-16	1	-10/+0
*	synthesis: rework memory inference.	Tristan Gingold	2020-02-16	3	-32/+101
*	synth: handle component with ports in different order.	Tristan Gingold	2020-02-13	3	-45/+46
*	vhdl-parse: improve recovery for incorrect end identifier.	Tristan Gingold	2020-02-13	1	-8/+27
*	files_maps-editor: fix incorrect assertion.	Tristan Gingold	2020-02-13	1	-1/+1
*	vhdl-sem_expr: avoid a crash on incorrect qualified expr.	Tristan Gingold	2020-02-13	1	-0/+6
*	synth-static_oper: handle more division operands. Fix #1134	Tristan Gingold	2020-02-12	1	-1/+2
*	synth: handle null vector for vec-vec concat. Fix #1133	Tristan Gingold	2020-02-11	2	-6/+12
*	synth-oper: handle add for (natural, unsigned). Fix #1132	Tristan Gingold	2020-02-11	1	-0/+15
*	netlists-memories: handle split memories. Fix #1127	Tristan Gingold	2020-02-11	1	-8/+18
*	translate: refine condition. Fix #1125	Tristan Gingold	2020-02-11	1	-1/+1
*	synth-static_oper: handle xor.	Tristan Gingold	2020-02-10	1	-0/+11
*	synth-expr: implement value and val attributes. Fix #1130	Tristan Gingold	2020-02-10	1	-1/+39
*	grt: split grt-errors, disp current process.	Tristan Gingold	2020-02-10	18	-104/+183
*	synth: remove remaining clock edge gates after memories.	Tristan Gingold	2020-02-10	2	-0/+26
*	netlists-memories: cleanup.	Tristan Gingold	2020-02-10	1	-319/+1
*	synth: rework (again) memory inference.	Tristan Gingold	2020-02-10	8	-80/+312
*	synth-inference: minor refactoring.	Tristan Gingold	2020-02-06	1	-24/+7
*	synth-decls: set a default value to non-assigned signals. Fix #1107	Tristan Gingold	2020-02-05	1	-1/+3
*	netlists-disp_vhdl: handle 1-bit const_x. For #1107	Tristan Gingold	2020-02-05	1	-3/+9
*	vhdl-sem_names: improve error location.	Tristan Gingold	2020-02-04	1	-1/+1
*	vhdl-sem: improve error location for unknown entity.	Tristan Gingold	2020-02-04	1	-1/+1
*	files_map: extract debug_source_file.	Tristan Gingold	2020-02-04	1	-40/+43
*	files_map-editor: fix file_length when moving gap at end.	Tristan Gingold	2020-02-04	1	-1/+4
*	files_map-editor: add more checks.	Tristan Gingold	2020-02-04	1	-0/+9
*	vhdl-sem_expr: avoid a crash on invalid attribute name.	Tristan Gingold	2020-02-04	1	-1/+1
*	vhdl-scanner: improve error message for empty quote.	Tristan Gingold	2020-02-04	1	-0/+6
*	testsuite/gna: add a test for previous commit.	Tristan Gingold	2020-02-04	1	-0/+4
*	vhdl-sem_utils: handle non-object interface for	Tristan Gingold	2020-02-04	1	-4/+6
*	vhdl-sem_expr: avoid a crash on invalid input.	Tristan Gingold	2020-02-04	1	-0/+5
*	configuration: allow hex-string for generic override. Fix #1117	Tristan Gingold	2020-02-02	1	-17/+86
*	trans-chap8: handle vector in aggregate target for variable assignments.	Tristan Gingold	2020-02-02	1	-23/+47
*	vhdl-sem_assocs: check conversion functions have only one parameter.	Tristan Gingold	2020-02-02	1	-0/+8
*	vhdl-sem_assocs: check that interface of function conv is a constant.	Tristan Gingold	2020-02-01	1	-1/+14
*	vhdl-sem_assocs: minor rework.	Tristan Gingold	2020-02-01	1	-32/+32
*	ghdllocal: remove unused use clause.	Tristan Gingold	2020-02-01	1	-1/+0
*	ghdllocal: add command --elab-order	Tristan Gingold	2020-02-01	2	-1/+72
*	synth-inference: use the mux output to detect end of walk. Fix #1122	Tristan Gingold	2020-02-01	1	-1/+8
*	synth-oper: handle std_match for slv. Close #1121	Tristan Gingold	2020-01-31	1	-1/+2
*	trans-chap8: optimize assignment for non-overlapping targets.	Tristan Gingold	2020-01-31	1	-11/+108