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*
netlists-disp_verilog: fix output of parameter assignments. Fix #1866
Tristan Gingold
2021-09-15
1
-12
/
+12
*
netlists-disp_verilog.adb: add 'parameter' before parameters declaration
Tristan Gingold
2021-09-15
1
-1
/
+1
*
synth/netlists-disp_verilog: fix output of parameter values. For #1866
Tristan Gingold
2021-09-15
3
-12
/
+37
*
vhdl: move Get_Source_Identifier to vhdl-utils
Tristan Gingold
2021-09-15
3
-18
/
+25
*
ortho_code-x86-insns: handle OE_ADD R_I_Off + R_I. Fix #1864
Tristan Gingold
2021-09-14
1
-0
/
+7
*
vhdl-sem_expr.adb: adjust aggregate element type extraction. For #737
Tristan Gingold
2021-09-14
1
-2
/
+7
*
trans-chap7: improve handling of vector in aggregates. Fix #1493
Tristan Gingold
2021-09-14
1
-32
/
+58
*
synth-vhdl_oper: handle nor for boolean
Tristan Gingold
2021-09-14
1
-0
/
+1
*
trans-chap3: improve comment
Tristan Gingold
2021-09-14
1
-4
/
+4
*
ortho: for slices, get element size from the result type
Tristan Gingold
2021-09-14
10
-17
/
+76
*
trans-chap7: improve handling of vector in aggregates. Fix #1453
Tristan Gingold
2021-09-12
1
-23
/
+27
*
trans-chap8: fix crash for slice in target aggregate. Fix #786
Tristan Gingold
2021-09-12
1
-0
/
+4
*
vhdl-sem_assocs: add a check to avoid a crash on an error. Fix #873
Tristan Gingold
2021-09-12
1
-0
/
+4
*
vhdl-canon: recurse for default block configuration of a vunit.
Tristan Gingold
2021-09-12
2
-19
/
+25
*
vhdl-configuration: also consider vunits to find top entity.
Tristan Gingold
2021-09-11
3
-37
/
+64
*
vhdl-configuration: also consider units instantiated in vunit. Fix #1860
Tristan Gingold
2021-09-11
1
-46
/
+64
*
synth-vhdl_stmts: fix crash on nested if-generate statement in vunits.
Tristan Gingold
2021-09-11
1
-2
/
+5
*
trans-chap7: improve support of aggregate. Fix #1843
Tristan Gingold
2021-09-10
1
-10
/
+29
*
vhdl: allow constants in vunit declarations. Fix #1856
Tristan Gingold
2021-09-08
2
-0
/
+3
*
ghdllocal: generalize top level unit extraction
Tristan Gingold
2021-09-07
5
-38
/
+59
*
vhdl-parse.adb: adjust error message. Fix #1485
Tristan Gingold
2021-09-07
1
-1
/
+1
*
options.adb: -Werror now applies on unclassified warnings.
Tristan Gingold
2021-09-07
1
-0
/
+1
*
netlists-cleanup: avoid crash when keep attribute value is a string
Tristan Gingold
2021-09-07
1
-2
/
+39
*
trans-chap7: Handle unbounded elements in Translate_Concatenation
Tristan Gingold
2021-09-07
1
-27
/
+98
*
trans-chap3: add a stride parameter to index_array. For #1831
Tristan Gingold
2021-09-07
2
-18
/
+21
*
vhdl/translate: adjust slice names for unbounded arrays. Fir #1836
Tristan Gingold
2021-09-03
3
-4
/
+25
*
vhdl-scanner.adb: add comments
Tristan Gingold
2021-09-03
1
-0
/
+6
*
vhdl,psl: abort is now identical to async_abort. For #1654
Tristan Gingold
2021-09-02
2
-6
/
+4
*
synth-vhdl_stmts.adb: do not expect configuration for vunit.
Tristan Gingold
2021-09-01
1
-3
/
+3
*
synth: handle PSL async_abort and sync_abort. For #1654
Tristan Gingold
2021-08-31
3
-10
/
+44
*
trans-chap9.adb: handle async_abort, sync_abort. Fix #1654
Tristan Gingold
2021-08-30
5
-145
/
+255
*
vhdl and psl: parse sync_abort and async_abort. For #1654
Tristan Gingold
2021-08-30
19
-155
/
+306
*
vhdl-canon: detect PSL assertion that cannot fail. For #1832
Tristan Gingold
2021-08-29
2
-3
/
+17
*
synth-vhdl_stmts: fix a crash on never triggered PSL assertion.
Tristan Gingold
2021-08-29
1
-0
/
+6
*
synth: improve result of is_positive
Tristan Gingold
2021-08-29
4
-10
/
+15
*
netlists-inference: improve location for dff.
Tristan Gingold
2021-08-29
1
-1
/
+1
*
synth: factorize code to create base instance
Tristan Gingold
2021-08-28
7
-57
/
+104
*
synthesis.adb: abstract instance_passes
Tristan Gingold
2021-08-28
3
-23
/
+34
*
synth-environment: add subprograms for signals (preliminary work)
Tristan Gingold
2021-08-28
2
-5
/
+110
*
synth-memtype: export conversion functions
Tristan Gingold
2021-08-28
2
-7
/
+9
*
synth: add build2_concat2 and use it for vhdl concat.
Tristan Gingold
2021-08-28
3
-4
/
+18
*
ghdlsynth: add debug option for elaboration
Tristan Gingold
2021-08-28
2
-1
/
+8
*
synth-vhdl_decls.adb: add comments
Tristan Gingold
2021-08-28
1
-0
/
+4
*
vhdl: handle foreign units in libraries and configuration
Tristan Gingold
2021-08-28
3
-24
/
+45
*
errorout: do not display empty lines
Tristan Gingold
2021-08-28
3
-1
/
+14
*
netlists-disp_verilog: handle initial value for idff and isignal
Tristan Gingold
2021-08-28
1
-8
/
+18
*
vhdl-parse: support for-generate in vunits. Fix #1850
Tristan Gingold
2021-08-27
1
-2
/
+10
*
synth: do not remove signals with a keep attribute.
Tristan Gingold
2021-08-27
2
-1
/
+31
*
std_names: add name keep.
Tristan Gingold
2021-08-27
2
-1
/
+3
*
netlists-disp_verilog: fix handling of unconnected port
Tristan Gingold
2021-08-26
1
-3
/
+1
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