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* vhdl-sem_decls: allow out/inout parameters to impure function in VHDL-2019Xiretza2022-03-011-3/+15
| | | | | This implements LCS-2016-002: http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/LCS2016_002
* vhdl-sem_types: allow methods to return file and protected types in -2019Xiretza2022-03-011-1/+3
| | | | | | This implements LCS2016_004: http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/LCS2016_004
* vhdl-sem_types: allow file and protected type access types in -2019Xiretza2022-03-011-7/+12
| | | | | This implements LCS-2016-014a: http://www.eda-twiki.org/cgi-bin/view.cgi/P1076/LCS2016_014a
* Add --std=19Xiretza2022-02-282-2/+3
| | | | | | Currently, all behaviour is the same as for --std=08, except for the standard library search path. No standard libraries exist yet, so running ghdl with --std=19 will fail.
* trans-chap6.adb: fix minor typing issueTristan Gingold2022-02-261-2/+11
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* vhdl-sem_psl.adb: don't crash on overload in HDL expr. Fix #1979Tristan Gingold2022-02-241-2/+12
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* synth: fix handling of record constraints in subtype. Fix #1961Tristan Gingold2022-02-221-4/+19
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* synth: do not annotate generic types in package. Fix #1949Tristan Gingold2022-01-151-1/+4
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* vhdl: add commentsTristan Gingold2022-01-151-1/+6
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* synth: handle macro-expanded package body. Fix #1948Tristan Gingold2022-01-141-4/+12
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* synth: refine handling of interface type. Fix #1944Tristan Gingold2022-01-101-6/+16
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* trans-chap2.adb: handle Kind_Component in Copy_Info. Fix #1943Tristan Gingold2022-01-091-1/+8
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* vhdl-sem_types: handle record in reparse_as_array_constraint. Fix #1934Tristan Gingold2022-01-091-0/+3
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* vhdl-sem_decls: copy subtype indication also for files. Fix #1936Tristan Gingold2021-12-281-0/+3
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* synth: handle interface type in generics. For #412Tristan Gingold2021-12-151-3/+8
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* ghdldrv: handle generic overrides on foreign unitsTristan Gingold2021-12-132-21/+54
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* vhdl-sem_expr.adb: avoid a crash after forced analysisTristan Gingold2021-12-131-1/+2
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* vhdl-sem.adb: fix incorrect check for conformance rulesTristan Gingold2021-12-031-1/+3
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* synth: adjustments for foreign_moduleTristan Gingold2021-11-281-0/+2
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* vhdl-parse: improve error message for empty recordsTristan Gingold2021-11-281-29/+33
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* vhdl/translate: handle target aggregate with unbounded names. Fix #1914Tristan Gingold2021-11-244-22/+75
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* vhdl-sem_decls: avoid a crash on invalid alias name. Fix #1919Tristan Gingold2021-11-211-0/+10
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* vhdl-utils.adb: minor refactoringTristan Gingold2021-11-171-7/+3
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* grt: refactoring to fix build failure. For #1913Tristan Gingold2021-11-171-2/+1
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* Add commentsTristan Gingold2021-11-171-0/+2
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* vhdl-evaluation: use grt to compute value attribute for integers.Tristan Gingold2021-11-171-6/+17
| | | | For #1913
* vhdl-evaluation: catch bad parameter for value attribute. Fix #1913Tristan Gingold2021-11-151-1/+7
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* vhdl-sem_expr: improve code generation for multi-dim aggregatesTristan Gingold2021-11-151-3/+3
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* vhdl: recognize ror/rol from ieee.numeric_std. For #1909Tristan Gingold2021-11-112-4/+20
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* vhdl: Iir_Kind_Foreign_Module is now a library unitTristan Gingold2021-11-0919-618/+687
| | | | | (instead of a design unit). Also, add Iir_Kind_Foreign_Vector_Type_Definition
* vhdl-configuration: stop earlier in case of error. Fix #1908Tristan Gingold2021-11-051-17/+19
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* vhdl/psl: handle PSL inherit spec. For #1899Tristan Gingold2021-11-056-39/+115
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* vhdl: parse PSL inherit spec. For #1899Tristan Gingold2021-11-049-362/+422
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* vhdl: add tok_inherit. Preliminary work for #1899Tristan Gingold2021-11-033-0/+5
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* trans-chap7: convert to base type for array-element operation. For #1898Tristan Gingold2021-11-031-3/+5
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* synth: Support alias declarations in vunittmeissner2021-11-023-3/+9
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* synth: do full elaboration before synthesisTristan Gingold2021-11-012-29/+43
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* vhdl: also warns on unused enumeration literalTristan Gingold2021-11-015-219/+256
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* vhdl-configuration.adb: avoid a crash in case of error. Fix #1897Tristan Gingold2021-10-181-2/+11
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* trans.adb: increased maximum identifier length. Fix #1894Tristan Gingold2021-10-161-1/+1
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* synth: add support for sequence instance in vunit. Fix #1889Tristan Gingold2021-10-133-1/+6
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* vhdl-scanner: improve error message. Fix #1883Tristan Gingold2021-10-061-1/+2
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* vhdl: report unused types and subtypesTristan Gingold2021-10-012-1/+13
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* vhdl-formatters: fix bad reformatting on a simple range.Tristan Gingold2021-10-011-0/+1
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* vhdl: warns on unused component declarationsTristan Gingold2021-09-302-1/+5
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* Add parsing of case? statement and simple test.Brian Padalino2021-09-248-79/+138
| | | | Also add the Matching flag to the Iir_Kind_Case_Statement.
* vhdl-ieee-vital_timing.adb: handle vhdl 2008. Fix #1875Tristan Gingold2021-09-231-3/+15
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* vhdl-evaluation.adb: Minor style fixesTristan Gingold2021-09-231-60/+61
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* vhdl-sem_assocs.adb: add commentsTristan Gingold2021-09-231-10/+41
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* Add explicit ?>= and ?> functions for translation.Brian Padalino2021-09-223-4/+8
| | | | | | Instead of swapping L/R arguments to try to create ?>= and ?>, create a function for each which performs the not operation of ?< and ?<= as defined by the LRM.
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