Commit message (Expand) | Author | Age | Files | Lines | |
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* | vhdl: allow discrete subtype indication for discrete_range. | Tristan Gingold | 2019-08-06 | 1 | -2/+2 |
* | vhdl: detect unused signals and variables. | Tristan Gingold | 2019-06-05 | 1 | -3/+0 |
* | vhdl: rename iirs to vhdl.nodes | Tristan Gingold | 2019-05-05 | 1 | -1/+1 |
* | vhdl: move sem* packages to vhdl children. | Tristan Gingold | 2019-05-05 | 1 | -0/+270 |