| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | vhdl-sem_inst: handle suspend_state | Tristan Gingold | 2023-01-04 | 1 | -181/+211 |
| * | vhdl-parse: handle 'end for' in configuration specification. | Tristan Gingold | 2022-12-21 | 1 | -286/+295 |
| * | vhdl: add Get/Set_Associated_package. For #2264 | Tristan Gingold | 2022-12-18 | 1 | -185/+200 |
| * | vhdl-nodes: add Get/Set_Instantiated_Header. | Tristan Gingold | 2022-12-16 | 1 | -100/+115 |
| * | vhdl-nodes: add Get/Set_Associated_Subprogram. | Tristan Gingold | 2022-11-30 | 1 | -183/+205 |
| * | vhdl-sem_assocs: handle association with external signal names. | Tristan Gingold | 2022-10-18 | 1 | -62/+64 |
| * | vhdl: add iir_kind_psl_boolean_parameter node. For #2178 | Tristan Gingold | 2022-08-15 | 1 | -212/+232 |
| * | vhdl: add support for file subtype. Fix #2174 | Tristan Gingold | 2022-08-11 | 1 | -258/+281 |
| * | vhdl: add Determined_Aggregate_Flag field. For #2166 | Tristan Gingold | 2022-08-10 | 1 | -134/+149 |
| * | vhdl: add an owner to interface type definition | Tristan Gingold | 2022-08-07 | 1 | -185/+200 |
| * | vhdl: add support for default in interface subprogram. Fix #2163 | Tristan Gingold | 2022-08-07 | 1 | -299/+336 |
| * | vhdl-nodes: add Get/Set_Stop_Flag. For #2150 | Tristan Gingold | 2022-07-29 | 1 | -116/+138 |
| * | vhdl-nodes: add Get/Set_Reference_Terminal_Flag | Tristan Gingold | 2022-07-25 | 1 | -204/+219 |
| * | vhdl-nodes: renaming. | Tristan Gingold | 2022-07-21 | 1 | -36/+37 |
| * | vhdl: add Iir_Kinds_AMS_Signal_Attribute | Tristan Gingold | 2022-07-16 | 1 | -14/+14 |
| * | vhdl: avoid crash on incorrect use of signatures | Tristan Gingold | 2022-07-02 | 1 | -281/+285 |
| * | vhdl: add a parent field to protected_type_declaration. Fix #2091 | Tristan Gingold | 2022-06-12 | 1 | -263/+265 |
| * | vhdl-nodes: add Inertial_Flag for association_element_by_expression | Tristan Gingold | 2022-06-12 | 1 | -302/+317 |
| * | vhdl-canon: add Canon_Add_Suspend_State | Tristan Gingold | 2022-05-26 | 1 | -187/+224 |
| * | vhdl-nodes: remove unused fields for procedure declarations | Tristan Gingold | 2022-05-17 | 1 | -219/+210 |
| * | vhdl: add suspend state pseudo decl and stmt. WIP. | Tristan Gingold | 2022-05-17 | 1 | -178/+194 |
| * | synth: add support for subtype declaration in vunits. Fix #2033 | Tristan Gingold | 2022-04-13 | 1 | -231/+237 |
| * | vhdl: parse return identifier (v19) | Tristan Gingold | 2022-03-04 | 1 | -208/+230 |
| * | vhdl: Iir_Kind_Foreign_Module is now a library unit | Tristan Gingold | 2021-11-09 | 1 | -353/+338 |
| * | vhdl: parse PSL inherit spec. For #1899 | Tristan Gingold | 2021-11-04 | 1 | -335/+336 |
| * | vhdl: also warns on unused enumeration literal | Tristan Gingold | 2021-11-01 | 1 | -209/+211 |
| * | Add parsing of case? statement and simple test. | Brian Padalino | 2021-09-24 | 1 | -73/+88 |
| * | trans-chap9.adb: handle async_abort, sync_abort. Fix #1654 | Tristan Gingold | 2021-08-30 | 1 | -110/+106 |
| * | vhdl and psl: parse sync_abort and async_abort. For #1654 | Tristan Gingold | 2021-08-30 | 1 | -107/+133 |
| * | vhdl: remove iir_kind_anonymous_signal_declaration (now unused) | Tristan Gingold | 2021-08-24 | 1 | -203/+181 |
| * | vhdl: introduce iir_kind_association_element_by_name | Tristan Gingold | 2021-08-06 | 1 | -299/+329 |
| * | vhdl-nodes: remove Identifier from Psl_Default_Clock | Tristan Gingold | 2021-06-30 | 1 | -101/+98 |
| * | vhdl: remove unused Get/Set_Alias_Declaration | Tristan Gingold | 2021-05-16 | 1 | -94/+68 |
| * | vhdl: add Iir_Kind_Foreign_Module | Tristan Gingold | 2021-04-05 | 1 | -317/+366 |
| * | vhdl-nodes.ads: reorder fields of block_configuration to match grammar | Tristan Gingold | 2021-02-20 | 1 | -1/+1 |
| * | Add support for PSL onehot/onehot0 functions (#1633) | T. Meissner | 2021-02-09 | 1 | -116/+136 |
| * | update license headers | umarcor | 2021-01-14 | 1 | -11/+9 |
| * | vhdl: fix reprint of vhdl08 array element constraints. | Tristan Gingold | 2021-01-05 | 1 | -255/+285 |
| * | vhdl: handle locally static attributes on entity/architecture/configurations | Tristan Gingold | 2020-12-08 | 1 | -266/+283 |
| * | vhdl: analyze subprogram instantiations. WIP. For #1470 | Tristan Gingold | 2020-09-26 | 1 | -203/+215 |
| * | vhdl: parse subprogram instantiations. For #1470 | Tristan Gingold | 2020-09-24 | 1 | -201/+259 |
| * | vhdl: parse and analyze force/release signal assignment statements. | Tristan Gingold | 2020-08-01 | 1 | -85/+189 |
| * | vhdl: adjust hanlding of guard signals for translate. | Tristan Gingold | 2020-07-25 | 1 | -191/+193 |
| * | vhdl: replace base_type with parent_type in nodes | Tristan Gingold | 2020-07-22 | 1 | -355/+329 |
| * | vhdl: fix ownership for recors subtypes. | Tristan Gingold | 2020-07-18 | 1 | -269/+273 |
| * | vhdl-nodes: make Subtype_Indication Maybe_Ref. For #641 | Tristan Gingold | 2020-06-30 | 1 | -221/+241 |
| * | vhdl-nodes: add Open_Flag to all generic interfaces. | Tristan Gingold | 2020-06-26 | 1 | -189/+204 |
| * | vhdl: create default configuration for a vunit. Fix #1372 | Tristan Gingold | 2020-06-15 | 1 | -226/+251 |
| * | Synthesis of PSL prev function. | Tristan Gingold | 2020-06-02 | 1 | -132/+140 |
| * | vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662 | Tristan Gingold | 2020-06-02 | 1 | -115/+214 |
